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From:   Harry Wentland <harry.wentland@amd.com>
To:     <amd-gfx@lists.freedesktop.org>
CC:     <ndesaulniers@google.com>, <torvalds@linux-foundation.org>,
        <linux-kernel@vger.kernel.org>, <arnd@kernel.org>,
        <sunpeng.li@amd.com>, <alexander.deucher@amd.com>,
        <christian.koenig@amd.com>, <Xinhui.Pan@amd.com>,
        <nathan@kernel.org>, <linux@roeck-us.net>, <llvm@lists.linux.dev>,
        Harry Wentland <harry.wentland@amd.com>
Subject: [PATCH 0/4] Fix stack usage of DML
Date:   Wed, 8 Sep 2021 21:00:19 -0400
Message-ID: <20210909010023.29110-1-harry.wentland@amd.com>
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With the '-Werror' enablement patch the amdgpu build was failing
on clang builds because a bunch of functions were blowing past
the 1024 byte stack frame default. Due to this we also noticed
that a lot of functions were passing large structs by value
instead of by pointer.

This series attempts to fix this.

There is still one remaining function that blows the 1024 limit by 40 bytes:

drivers/gpu/drm/amd/amdgpu/../display/dc/dml/dcn21/display_mode_vba_21.c:3397:6:
 
error: stack frame size of 1064 bytes in function 
'dml21_ModeSupportAndSystemConfigurationFull' [-Werror,-Wframe-larger-than=]

This will be a slightly more challenging fix but I'll see if we can get it
below 1024 by breaking it into smaller functions.

With this series I can build amdgpu with CC=clang and a stack frame limit of 
1064.

This series boots on a Radeon RX 5500 XT.

Harry Wentland (4):
  drm/amd/display: Pass display_pipe_params_st as const in DML
  drm/amd/display: Pass all structs in display_rq_dlg_helpers by pointer
  drm/amd/display: Fix rest of pass-by-value structs in DML
  drm/amd/display: Allocate structs needed by dcn_bw_calc_rq_dlg_ttu in
    pipe_ctx

 .../gpu/drm/amd/display/dc/calcs/dcn_calcs.c  |  55 ++--
 .../drm/amd/display/dc/dcn20/dcn20_resource.c |   2 +-
 .../dc/dml/dcn20/display_rq_dlg_calc_20.c     | 158 +++++------
 .../dc/dml/dcn20/display_rq_dlg_calc_20.h     |   4 +-
 .../dc/dml/dcn20/display_rq_dlg_calc_20v2.c   | 156 +++++------
 .../dc/dml/dcn20/display_rq_dlg_calc_20v2.h   |   4 +-
 .../dc/dml/dcn21/display_rq_dlg_calc_21.c     | 156 +++++------
 .../dc/dml/dcn21/display_rq_dlg_calc_21.h     |   4 +-
 .../dc/dml/dcn30/display_rq_dlg_calc_30.c     | 132 ++++-----
 .../dc/dml/dcn30/display_rq_dlg_calc_30.h     |   4 +-
 .../dc/dml/dcn31/display_rq_dlg_calc_31.c     | 166 ++++++------
 .../dc/dml/dcn31/display_rq_dlg_calc_31.h     |   4 +-
 .../drm/amd/display/dc/dml/display_mode_lib.h |   4 +-
 .../display/dc/dml/display_rq_dlg_helpers.c   | 256 +++++++++---------
 .../display/dc/dml/display_rq_dlg_helpers.h   |  20 +-
 .../display/dc/dml/dml1_display_rq_dlg_calc.c | 246 ++++++++---------
 .../display/dc/dml/dml1_display_rq_dlg_calc.h |  10 +-
 .../gpu/drm/amd/display/dc/inc/core_types.h   |   3 +
 18 files changed, 695 insertions(+), 689 deletions(-)

-- 
2.33.0