Received: by 2002:a05:6a10:eb17:0:0:0:0 with SMTP id hx23csp451904pxb; Thu, 9 Sep 2021 04:56:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx3PgRwsA0jTZkVnVjz5valnT2E2Ln28Yh0abLgWggXxnsIfe21SX6wRuRu6LisUZAiWg0E X-Received: by 2002:a5d:851a:: with SMTP id q26mr2248624ion.163.1631188563237; Thu, 09 Sep 2021 04:56:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631188563; cv=none; d=google.com; s=arc-20160816; b=YnXv6pO40B6CRoQw2hyWXCwYXxN6TVPPhcSMe3eDcuYuJolTpxiBLxR8cn2vgZGrmo +L9fNCrqIs64a1Hn1+2bfsHsFbiqHU5nk6IKYdJ0QUywI7yrzDCLfsvzFX3/+sU51hFY YjG5wexkHzA+tjv8o+0IFPDFsD/rq7NJBrejQQqTxE5kZaB2yUOLL9wruCLUCkLb+TEE a5EkvEUnzNmK2OjawXiA8poQWaiqyYh0RAxOe28TkvKuVNFCKdoF91jM2o/ppxNsrnXT fG1ed8R74nsMOxwl8CI2ulqoDWcPnzgGt5iEtYdR0rmO8Kyyy87tflsIi2TJJXSlGhy3 LhyA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=UWSDAPn35fnzZrqdFpjvaGKXySNiTyW2v5JlEheWsWg=; b=b6QCX4Bc/pvCIoj0/cYDqiIc7L5zjokuK+K9jxmCZrkN9t8rn+Kyh2IMKxPbXEOs28 nQVe8+OGTotdm+FHRuyxugpZnnY0L0aPJHfXuuR2KZg8bCBtA6+N/kqSBLQk3/HyDUBp h7g5GYexj7nGGynBtEGLW4oV19xUknV7p50HrgvN0Qc8iZNCjYs9A4tGDgZCmgXOVx4J 9p2aNuqpa6BHAe3O/vxqya2eo5ObNH7+r+703CR4DdHfinH54fgd4M+9VSBvxrJagSWi nbeVljTIVunHgI6rE/iwh/M5XAgs7bi+g7G5tWr0BMPXxghvHsxyz4VxO/ooDKhtnAG3 QTYg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=e3YwAiPM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id y9si1616196ilc.12.2021.09.09.04.55.51; Thu, 09 Sep 2021 04:56:03 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=e3YwAiPM; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243102AbhIIL4M (ORCPT + 99 others); Thu, 9 Sep 2021 07:56:12 -0400 Received: from mail.kernel.org ([198.145.29.99]:55124 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242964AbhIILw7 (ORCPT ); Thu, 9 Sep 2021 07:52:59 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 1BD5261390; Thu, 9 Sep 2021 11:44:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1631187867; bh=COzna+AUvS9AjH9VMQTRotAp6F8lPQK/nnKVsWvii1s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=e3YwAiPMR2tRz/HjvMj7fcu3nsM64Z6tAtw3ys3m6C9YB2H3GKlpx+nyeNDbxHn8o IWcf3F/8uVm6ok4PZFmp5SYckJB+0VCVpbL2Ed7sgjfNCgT0p4JpeCIlhLmZqY0KkS dmkSZrPeKEjyFJ424COhK8YwPTb3gTEh7NuaW9ikoU4/pvtULPBDZpXlA+xwE4o1N/ GHEQNHVUn+FyQsr/5Sezd6nC8K5E3eHRGuDp2tuxh4B997PrJndUlAwB9TeO0NmM1w 3a993ublTFHdLhIYGutY8RKuYmHHOxY9puBJvkTam2CJGjUq52acIgFCgm6qtha6+w vnqG7XKSdXNJg== From: Sasha Levin To: linux-kernel@vger.kernel.org, stable@vger.kernel.org Cc: Tim Harvey , Shawn Guo , Sasha Levin , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH AUTOSEL 5.14 154/252] arm64: dts: imx8mm-venice-gw700x: fix invalid pmic pin config Date: Thu, 9 Sep 2021 07:39:28 -0400 Message-Id: <20210909114106.141462-154-sashal@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210909114106.141462-1-sashal@kernel.org> References: <20210909114106.141462-1-sashal@kernel.org> MIME-Version: 1.0 X-stable: review X-Patchwork-Hint: Ignore Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Tim Harvey [ Upstream commit 500659f3b401fe6ffd1d63f2449d16d8a4204db7 ] The GW700x PMIC does not have an interrupt. Remove the invalid pin config. Signed-off-by: Tim Harvey Signed-off-by: Shawn Guo Signed-off-by: Sasha Levin --- arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi | 8 -------- 1 file changed, 8 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi index 11dda79cc46b..00f86cada30d 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-venice-gw700x.dtsi @@ -278,8 +278,6 @@ rtc@68 { pmic@69 { compatible = "mps,mp5416"; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pmic>; reg = <0x69>; regulators { @@ -444,12 +442,6 @@ MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 >; }; - pinctrl_pmic: pmicgrp { - fsl,pins = < - MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x41 - >; - }; - pinctrl_uart2: uart2grp { fsl,pins = < MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 -- 2.30.2