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Date:   Thu, 9 Sep 2021 07:07:02 -0700
From:   Matthias Kaehlcke <mka@chromium.org>
To:     rajpat@codeaurora.org
Cc:     Andy Gross <agross@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
        devicetree@vger.kernel.org, rnayak@codeaurora.org,
        saiprakash.ranjan@codeaurora.org, msavaliy@qti.qualcomm.com,
        skakit@codeaurora.org, sboyd@kernel.org, dianders@chromium.org,
        Roja Rani Yarubandi <rojay@codeaurora.org>
Subject: Re: [PATCH V7 6/7] arm64: dts: sc7280: Add QUPv3 wrapper_1 nodes
Message-ID: <YToVBqaa7FUL3GVw@google.com>
References: <1630643340-10373-1-git-send-email-rajpat@codeaurora.org>
 <1630643340-10373-7-git-send-email-rajpat@codeaurora.org>
 <YTJZ8YkjrCmyzNjG@google.com>
 <c0c74fc30ef3f3b1432ab2e614862b93@codeaurora.org>
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Precedence: bulk

On Thu, Sep 09, 2021 at 10:14:18AM +0530, rajpat@codeaurora.org wrote:
> On 2021-09-03 22:52, Matthias Kaehlcke wrote:
> > On Fri, Sep 03, 2021 at 09:58:59AM +0530, Rajesh Patil wrote:
> > > From: Roja Rani Yarubandi <rojay@codeaurora.org>
> > > 
> > > Add QUPv3 wrapper_1 DT nodes for SC7280 SoC.
> > > 
> > > Signed-off-by: Roja Rani Yarubandi <rojay@codeaurora.org>
> > > Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
> > > ---
> > >  arch/arm64/boot/dts/qcom/sc7280.dtsi | 709
> > > +++++++++++++++++++++++++++++++++++
> > >  1 file changed, 709 insertions(+)
> > > 
> > > diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > > b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > > index 32d1354..8fe54bf 100644
> > > --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > > +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
> > 
> > > +			qup_spi8_data_clk: qup-spi8-data-clk {
> > > +				pins = "gpio32", "gpio33", "gpio34";
> > > +				function = "qup10";
> > > +			};
> > > +
> > > +			qup_spi8_cs: qup-spi8-cs {
> > > +				pins = "gpio35";
> > > +				function = "qup10";
> > > +			};
> > 
> > As for wrapper_0, I think we still want the nodes to configure the CS as
> > GPIO.
> > 
> > If there are no other reasons to re-spin these could be added with a
> > follow-up
> > patch, so:
> > 
> shall we add all removed qup_spiN_cs_gpio nodes?

Yes