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[23.128.96.18]) by mx.google.com with ESMTP id p14si5580200ilo.31.2021.09.10.02.37.15; Fri, 10 Sep 2021 02:37:27 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@infradead.org header.s=casper.20170209 header.b=bcT6h50r; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232016AbhIJJhK (ORCPT + 99 others); Fri, 10 Sep 2021 05:37:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47800 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231916AbhIJJhK (ORCPT ); Fri, 10 Sep 2021 05:37:10 -0400 Received: from casper.infradead.org (casper.infradead.org [IPv6:2001:8b0:10b:1236::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5600DC061574; Fri, 10 Sep 2021 02:35:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=casper.20170209; h=In-Reply-To:Content-Type:MIME-Version: References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=1zHanfdh3/bn0UbYzdL99BhoAIVMMbNw6i4+osoTWXY=; b=bcT6h50rGNw0WqF6pE/cumxuoO uxG77d48Cx6yMxkoK4fC++tqH2dlXxb2A8IKHGmitqxZ8lCbnIQN4++vea4Lz7KHAPDYj7jQbcgUM GFnkmFY0wMGaJoMxNbmBTCS94OeCD9l6bwikcKfpFZbNuAbJJUnJRPfsye8V6Djo54lMwTjsdC4Mp bSTmlzU9055zaUpx/byO9DU92YJ4vRtNt5SbY1CRQ2DesbA5AX6XRqI49nG0/1GdKNBs5AhYQPdFh oxJ6wdOP3leOOCFn0M8Y6w3QCLQk6ql3faud8lIzxDYBGgtoo6i134d/jGU1BBKr+YBFL4dgPOBBU WbJQxprw==; Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.94.2 #2 (Red Hat Linux)) id 1mOcuV-00AsCl-Pq; Fri, 10 Sep 2021 09:33:37 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id 66C2530022C; Fri, 10 Sep 2021 11:33:25 +0200 (CEST) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id 485A723CBCBEE; Fri, 10 Sep 2021 11:33:25 +0200 (CEST) Date: Fri, 10 Sep 2021 11:33:25 +0200 From: Peter Zijlstra To: Boqun Feng Cc: Dan Lustig , Will Deacon , Linus Torvalds , Alan Stern , Alexander Shishkin , Peter Anvin , Andrea Parri , Ingo Molnar , "Paul E. McKenney" , Vince Weaver , Thomas Gleixner , Jiri Olsa , Arnaldo Carvalho de Melo , Linux Kernel Mailing List , Stephane Eranian , linux-tip-commits@vger.kernel.org, palmer@dabbelt.com, paul.walmsley@sifive.com, mpe@ellerman.id.au Subject: Re: [tip:locking/core] tools/memory-model: Add extra ordering for locks and remove it for ordinary release/acquire Message-ID: References: <20180926182920.27644-2-paulmck@linux.ibm.com> <20210908144217.GA603644@rowland.harvard.edu> <20210909133535.GA9722@willie-the-truck> <5412ab37-2979-5717-4951-6a61366df0f2@nvidia.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Sep 10, 2021 at 08:01:14AM +0800, Boqun Feng wrote: > On Thu, Sep 09, 2021 at 01:03:18PM -0400, Dan Lustig wrote: > > On 9/9/2021 9:35 AM, Will Deacon wrote: > > > On Thu, Sep 09, 2021 at 09:25:30AM +0200, Peter Zijlstra wrote: > > >> The AMOSWAP is a RmW and as such matches the W from the RW->W fence, > > >> similarly it marches the R from the R->RW fence, yielding an: > > >> > > >> RW-> W > > >> RmW > > >> R ->RW > > >> > > >> ordering. It's the stores S and R that can be re-ordered, but not the > > >> sections themselves (same on PowerPC and many others). > > I agree with Will here. If the AMOSWAP above is actually implemented with > > a RISC-V AMO, then the two critical sections will be separated as if RW,RW, > > as Peter described. If instead it's implemented using LR/SC, then RISC-V > > Just out of curiosity, in the following code, can the store S and load L > be reordered? > > WRITE_ONCE(x, 1); // store S > FENCE RW, W > WRITE_ONCE(s.lock, 0); // unlock(s) > AMOSWAP %0, 1, s.lock // lock(s) > FENCE R, RW > r1 = READ_ONCE(y); // load L > > I think they can, because neither "FENCE RW, W" nor "FENCE R, RW" order > them. I'm confused by your argument, per the above quoted section, those fences and the AMO combine into a RW,RW ordering which is (as per the later clarification) multi-copy-atomic, aka smp_mb(). As such, S and L are not allowed to be re-ordered in the given scenario. > Note that the reordering is allowed in LKMM, because unlock-lock > only need to be as strong as RCtso. Risc-V is strictly stronger than required in this instance. Given the current lock implementation. Daniel pointed out that if the atomic op were LL/SC based instead of AMO it would end up being RCtso.