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From:   guoren@kernel.org
To:     anup.patel@wdc.com, atish.patra@wdc.com, palmerdabbelt@google.com,
        guoren@kernel.org, christoph.muellner@vrull.eu,
        philipp.tomsich@vrull.eu, hch@lst.de, liush@allwinnertech.com,
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Cc:     linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
        taiten.peng@canonical.com, aniket.ponkshe@canonical.com,
        heinrich.schuchardt@canonical.com, gordan.markus@canonical.com,
        Guo Ren <guoren@linux.alibaba.com>
Subject: [RFC PATCH V4 0/6] riscv: Add PBMT & DMA for D1 bringup
Date:   Sat, 11 Sep 2021 17:21:33 +0800
Message-Id: <20210911092139.79607-1-guoren@kernel.org>
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From: Guo Ren <guoren@linux.alibaba.com>

These patches are a continuation of "riscv: Add DMA_COHERENT support for
Allwinner D1". In this version, we rebase on Atish's Global dma pool
patchset, and it has been tested on qemu and our hardware platforms.
But we append "select DMA_DIRECT_REMAP" in RISCV_DMA_NONCOHERENT, so not
sure it would affect Atish's hardware platform.

We still use riscv_dma_cache_sync_set, not the alternative code. I agree
the alternative framework is better for performance in dma ops. Maybe
Atish's next version of the patch would use it.

The custom PBMT implementation is moved into errata and add
apply_errata_setup_vm() in setup_vm prologue. Hope it could be approved.

You can follow the D1 fedora wiki[1], try the latest kernel with the
patchset.
[1] https://fedoraproject.org/wiki/Architectures/RISC-V/Allwinner#Build_Linux_Kernel_for_D1

Previous versions:
V3: https://lore.kernel.org/linux-riscv/1623693067-53886-1-git-send-email-guoren@kernel.org/
V2: https://lore.kernel.org/linux-riscv/1622970249-50770-10-git-send-email-guoren@kernel.org/
V1: https://lore.kernel.org/linux-riscv/1621400656-25678-3-git-send-email-guoren@kernel.org/

Atish Patra (2):
  RISC-V: Support a new config option for non-coherent DMA
  RISC-V: Implement arch_sync_dma* functions

Guo Ren (3):
  riscv: pgtable: Add custom protection_map init
  riscv: errata: pgtable: Add custom Svpbmt supported for Allwinner D1
  riscv: errata: Support T-HEAD custom dcache ops

Liu Shaohua (1):
  riscv: soc: Add Allwinner SoC kconfig option

 arch/riscv/Kconfig                       |  13 +++
 arch/riscv/Kconfig.erratas               |  11 +++
 arch/riscv/Kconfig.socs                  |  15 ++++
 arch/riscv/configs/defconfig             |   1 +
 arch/riscv/errata/Makefile               |   1 +
 arch/riscv/errata/alternative.c          |  23 +++++
 arch/riscv/errata/thead/Makefile         |   1 +
 arch/riscv/errata/thead/errata.c         | 108 +++++++++++++++++++++++
 arch/riscv/include/asm/alternative.h     |   4 +
 arch/riscv/include/asm/dma-noncoherent.h |  19 ++++
 arch/riscv/include/asm/fixmap.h          |   2 +-
 arch/riscv/include/asm/pgtable-64.h      |   8 +-
 arch/riscv/include/asm/pgtable-bits.h    |  46 +++++++++-
 arch/riscv/include/asm/pgtable.h         |  30 ++++---
 arch/riscv/include/asm/vendorid_list.h   |   1 +
 arch/riscv/mm/Makefile                   |   1 +
 arch/riscv/mm/dma-noncoherent.c          |  66 ++++++++++++++
 arch/riscv/mm/init.c                     |  28 ++++++
 mm/mmap.c                                |   4 +
 19 files changed, 366 insertions(+), 16 deletions(-)
 create mode 100644 arch/riscv/errata/thead/Makefile
 create mode 100644 arch/riscv/errata/thead/errata.c
 create mode 100644 arch/riscv/include/asm/dma-noncoherent.h
 create mode 100644 arch/riscv/mm/dma-noncoherent.c

-- 
2.25.1