Subject: Re: [PATCH -rt][RESEND] fix preempt hardirqs on OMAP
From: Daniel Walker <dwalker@mvista.com>
To: Russell King <rmk+lkml@arm.linux.org.uk>
Cc: Ingo Molnar <mingo@elte.hu>, tglx@linutronix.de,
       linux-kernel@vger.kernel.org
In-Reply-To: <20061211195401.GA12440@flint.arm.linux.org.uk>
References: <20061210163545.488430000@mvista.com>
	 <20061211190554.GA26392@elte.hu> <1165865908.8103.30.camel@imap.mvista.com>
	 <20061211195401.GA12440@flint.arm.linux.org.uk>
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Date: Mon, 11 Dec 2006 11:59:20 -0800
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On Mon, 2006-12-11 at 19:54 +0000, Russell King wrote:

> > > what if the irq got disabled meanwhile? Also, chip->enable is a 
> > > compatibility method, not something we should use in a flow handler.
> > 
> > I don't know how other arches deal with IRQ_PENDING, but ARM (OMAP at
> > least) disables the IRQ on IRQ_PENDING.
> 
> Please point out where it's doing that, and I'll take a look to see
> if it's doing something it shouldn't.

It's in arch/arm/plat-omap/gpio.c . It uses the lowlevel function to
disable the interrupt, not chip->disable() . In gpio_irq_handler() .

Daniel

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