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Date:   Tue, 14 Sep 2021 09:20:46 +0200
From:   Maxime Ripard <maxime@cerno.tech>
To:     Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Cc:     guoren@kernel.org, Liu Shaohua <liush@allwinnertech.com>,
        wefu@redhat.com, anup.patel@wdc.com, atish.patra@wdc.com,
        palmerdabbelt@google.com, christoph.muellner@vrull.eu,
        philipp.tomsich@vrull.eu, hch@lst.de, lazyparser@gmail.com,
        drew@beagleboard.org, linux-riscv@lists.infradead.org,
        linux-kernel@vger.kernel.org, taiten.peng@canonical.com,
        aniket.ponkshe@canonical.com, gordan.markus@canonical.com,
        Guo Ren <guoren@linux.alibaba.com>,
        Chen-Yu Tsai <wens@csie.org>
Subject: Re: [RFC PATCH V4 6/6] riscv: soc: Add Allwinner SoC kconfig option
Message-ID: <20210914072046.s3nhxaut6kihe3tn@gilmour>
References: <20210911092139.79607-1-guoren@kernel.org>
 <20210911092139.79607-7-guoren@kernel.org>
 <20210913084520.kkbsupogkzv226x3@gilmour>
 <e46bb02d-961d-672d-76c7-9844d76ee69b@canonical.com>
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Hi,

On Tue, Sep 14, 2021 at 05:49:52AM +0200, Heinrich Schuchardt wrote:
> > Hi,
> >=20
> > On Sat, Sep 11, 2021 at 05:21:39PM +0800, guoren@kernel.org wrote:
> > > From: Liu Shaohua <liush@allwinnertech.com>
> > >=20
> > > Add Allwinner kconfig option which selects SoC specific and common
> > > drivers that is required for this SoC.
> > >=20
> > > Allwinner D1 uses custom PTE attributes to solve non-coherency SOC
> > > interconnect issues for dma synchronization, so we set the default
> > > value when SOC_SUNXI selected.
> > >=20
> > > Signed-off-by: Liu Shaohua <liush@allwinnertech.com>
> > > Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
> > > Signed-off-by: Wei Fu <wefu@redhat.com>
> > > Cc: Anup Patel <anup.patel@wdc.com>
> > > Cc: Atish Patra <atish.patra@wdc.com>
> > > Cc: Christoph Hellwig <hch@lst.de>
> > > Cc: Chen-Yu Tsai <wens@csie.org>
> > > Cc: Drew Fustini <drew@beagleboard.org>
> > > Cc: Maxime Ripard <maxime@cerno.tech>
> > > Cc: Palmer Dabbelt <palmerdabbelt@google.com>
> > > Cc: Wei Wu <lazyparser@gmail.com>
> > > ---
> > >   arch/riscv/Kconfig.socs      | 15 +++++++++++++++
> > >   arch/riscv/configs/defconfig |  1 +
> > >   2 files changed, 16 insertions(+)
> > >=20
> > > diff --git a/arch/riscv/Kconfig.socs b/arch/riscv/Kconfig.socs
> > > index 30676ebb16eb..8721c000ef23 100644
> > > --- a/arch/riscv/Kconfig.socs
> > > +++ b/arch/riscv/Kconfig.socs
> > > @@ -70,4 +70,19 @@ config SOC_CANAAN_K210_DTB_SOURCE
> > >   endif
> > > +config SOC_SUNXI
> > > +	bool "Allwinner SoCs"
> > > +	depends on MMU
> > > +	select DWMAC_GENERIC
> > > +	select ERRATA_THEAD
> > > +	select RISCV_DMA_NONCOHERENT
> > > +	select RISCV_ERRATA_ALTERNATIVE
> > > +	select SERIAL_8250
> > > +	select SERIAL_8250_CONSOLE
> > > +	select SERIAL_8250_DW
> > > +	select SIFIVE_PLIC
> > > +	select STMMAC_ETH
> > > +	help
> > > +	  This enables support for Allwinner SoC platforms like the D1.
> > > +
> >=20
> > I'm not sure we should select the drivers there. We could very well
> > imagine a board without UART, or even more so without ethernet.
>=20
> The draft of the RISC-V platform specification is available here:
> https://github.com/riscv/riscv-platform-specs/blob/main/riscv-platform-sp=
ec.adoc#uartserial-console
>=20
> The specification requires in section "2.1.5.1. UART/Serial Console" that=
 on
> platforms with a rich operating system (e.g. Linux) you have a serial
> console. Hence requiring 8250 support for the D1 CPU is justified.

I mean, not really? The platform is required to have a UART, but nothing
requires the kernel to have a driver for it as far as I'm aware.

Maxime

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