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[23.128.96.18]) by mx.google.com with ESMTP id 4si10165395ejm.546.2021.09.14.02.49.21; Tue, 14 Sep 2021 02:49:44 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=t8nrtFt4; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229968AbhINJsM (ORCPT + 99 others); Tue, 14 Sep 2021 05:48:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56626 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229946AbhINJsM (ORCPT ); Tue, 14 Sep 2021 05:48:12 -0400 Received: from mail-ej1-x62b.google.com (mail-ej1-x62b.google.com [IPv6:2a00:1450:4864:20::62b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CBD2CC061762 for ; Tue, 14 Sep 2021 02:46:54 -0700 (PDT) Received: by mail-ej1-x62b.google.com with SMTP id x11so27587216ejv.0 for ; Tue, 14 Sep 2021 02:46:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=JvRU2iFGpeccVMjKtT6+w9RLMGZt7GKZuC+LrVKqfH0=; b=t8nrtFt41e1x2hjfB+hxvI9+eBukzuV7NTc1HQbRTbL8KvWZ5US9ohxp3jIdQRMzNW QSD8url1KQQ5Z2uU0ehu1MHjs6ZfwnarWTyqYP7EbHt2mk8rrtjWShCs+oMH8x45WJ/O pH3DPccXXOXcZwODq2zBYgNCdMzjEJSy5jz6aQfSSAmYdIUzyBDONox3oE+/X0+IWlos sublqwOAVJfDSzNYeKVB+nmpxBHCMNyvjvbecTYiXrYAQKzPCeF5LKaBh2kcM5eHkANY f98J/vbQ5rhivwPzfELxDtdQbXKcyOOzbfmV30itqZjdwTy7GiJSprk49r5Xf5IqiYI5 +GSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=JvRU2iFGpeccVMjKtT6+w9RLMGZt7GKZuC+LrVKqfH0=; b=lxMfGJ+ZkqdeVOwEVgoRPhSPXZHtVIsEVzD5m8Uun6tZO/LQuzmx6UE0GgNoXMxLkg HJ77DSn+y9evz2sviJebgmaRSMega4ADNi34iTKLdN+/nmxA0fwoPoM3HfpaYuzr/jvQ ky9BW3mp3NKt4QMg3oz4bFAsIZimYzmd1MoFuXywf08l0q+bJdw4464hEblox6iwxRlm X+F4D2lLd2ndNiQf8ZZ9BxftJJRetbvwaL4Dm/SWdVeaZnzptbCrORye6EphQ7qBPr3C iTpddV4r99HKP3kn9NVgVyd+nw7Y9xUQdP12UI5f/Tzo8EAq0xLRQx3uXMpVlPZF9Xr2 dm5w== X-Gm-Message-State: AOAM530iEfjRRRjWx5H4XSsWjCn1UCULujFbRyA/gr+gqJLAqG6FX8ym 5l+wOKpcIcfv6PZYoN73iwexvi+hjhrrdHj2YjEoQA== X-Received: by 2002:a17:906:417:: with SMTP id d23mr18175227eja.383.1631612813299; Tue, 14 Sep 2021 02:46:53 -0700 (PDT) MIME-Version: 1.0 References: <720d0a9a42e33148fcac45cd39a727093a32bf32.1614965598.git.robin.murphy@arm.com> <0a1d437d-9ea0-de83-3c19-e07f560ad37c@arm.com> <20210730143431.GB1517404@mutt> <8b358507-dbdf-b05b-c1da-2ec9903a2912@arm.com> In-Reply-To: <8b358507-dbdf-b05b-c1da-2ec9903a2912@arm.com> From: Anders Roxell Date: Tue, 14 Sep 2021 11:46:42 +0200 Message-ID: Subject: Re: [PATCH 2/2] arm64: dts: juno: Enable more SMMUs To: Robin Murphy Cc: sudeep.holla@arm.com, Lorenzo Pieralisi , liviu.dudau@arm.com, Linux ARM , linux-stable , Linux Kernel Mailing List , Greg Kroah-Hartman , Sasha Levin , Arnd Bergmann , lkft-triage@lists.linaro.org, Linux Kernel Functional Testing Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 30 Jul 2021 at 16:44, Robin Murphy wrote: > > On 2021-07-30 15:34, Anders Roxell wrote: > > On 2021-07-30 13:17, Robin Murphy wrote: > >> On 2021-07-30 12:35, Anders Roxell wrote: > >>> From: Robin Murphy > >>> > >>>> Now that PCI inbound window restrictions are handled generically between > >>>> the of_pci resource parsing and the IOMMU layer, and described in the > >>>> Juno DT, we can finally enable the PCIe SMMU without the risk of DMA > >>>> mappings inadvertently allocating unusable addresses. > >>>> > >>>> Similarly, the relevant support for IOMMU mappings for peripheral > >>>> transfers has been hooked up in the pl330 driver for ages, so we can > >>>> happily enable the DMA SMMU without that breaking anything either. > >>>> > >>>> Signed-off-by: Robin Murphy > >>> > >>> When we build a kernel with 64k page size and run the ltp syscalls we > >>> sporadically see a kernel crash while doing a mkfs on a connected SATA > >>> drive. This is happening every third test run on any juno-r2 device in > >>> the lab with the same kernel image (stable-rc 5.13.y, mainline and next) > >>> with gcc-11. > >> > >> Hmm, I guess 64K pages might make a difference in that we'll chew through > >> IOVA space a lot faster with small mappings... > >> > >> I'll have to try to reproduce this locally, since the interesting thing > >> would be knowing what DMA address it was trying to use that went wrong, but > >> IOMMU tracepoints and/or dma-debug are going to generate an crazy amount of > >> data to sift through and try to correlate - having done it before it's not > >> something I'd readily ask someone else to do for me :) > >> > >> On a hunch, though, does it make any difference if you remove the first > >> entry from the PCIe "dma-ranges" (the 0x2c1c0000 one)? > > > > I did this change, and run the job 7 times and could not reproduce the > > issue. > > Thanks! And hold that thought; if it works then I suspect it probably is > the best fix, but I'll double-check and write it up properly next week. I just want to send a friendly reminder to this issue, since I haven't seen a patch for this. We still see the issue on v5.13.y and above. Or have I missed anything? Cheers, Anders > > Cheers, > Robin. > > > diff --git a/arch/arm64/boot/dts/arm/juno-base.dtsi b/arch/arm64/boot/dts/arm/juno-base.dtsi > > index 8e7a66943b01..d3148730e951 100644 > > --- a/arch/arm64/boot/dts/arm/juno-base.dtsi > > +++ b/arch/arm64/boot/dts/arm/juno-base.dtsi > > @@ -545,8 +545,7 @@ pcie_ctlr: pcie@40000000 { > > <0x02000000 0x00 0x50000000 0x00 0x50000000 0x0 0x08000000>, > > <0x42000000 0x40 0x00000000 0x40 0x00000000 0x1 0x00000000>; > > /* Standard AXI Translation entries as programmed by EDK2 */ > > - dma-ranges = <0x02000000 0x0 0x2c1c0000 0x0 0x2c1c0000 0x0 0x00040000>, > > - <0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x80000000>, > > + dma-ranges = <0x02000000 0x0 0x80000000 0x0 0x80000000 0x0 0x80000000>, > > <0x43000000 0x8 0x00000000 0x8 0x00000000 0x2 0x00000000>; > > #interrupt-cells = <1>; > > interrupt-map-mask = <0 0 0 7>; > > > > > > Cheers, > > Anders > >