Received: by 2002:a05:6a11:4021:0:0:0:0 with SMTP id ky33csp622617pxb; Tue, 14 Sep 2021 05:21:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyO4Buk/AhxT7/T1rcodeZHY7mfwbYcegxyuk59ilNyGTpOjNWYrRIwjUteDEMofnZjvDVF X-Received: by 2002:a2e:bc26:: with SMTP id b38mr15397381ljf.497.1631622093413; Tue, 14 Sep 2021 05:21:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631622093; cv=none; d=google.com; s=arc-20160816; b=IZ0tpOtJq3KjUpuyFe5q3OzKmcEbmypXsw1zrYDdgZ9wwcEjzx757aLTYCTj8EHkvN LFXbmKX6fST6qjbGJszvPbVlykvuIleq7PT8AA3uj/CefF/XuNdxsxbPenCIQFiqaB83 cP90gZ4EYOWS3hibUrUzO1PuMrpoJea44gbPeHeXjX0tRHnNkli7TVsdZFpHvapw3m2C bg3CUaqPDixFo7dXaX+ANQVtHMYnIazJGgiDV/mNztEGpERL678kG6XwxZbv+I4pU/Fz ifcRJJ3xOInj5L+EagMdgglL+4nQy2pWpiQfOaw58rNid5BrU3lPWa8/fn/9LO46Pgai +j/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:message-id:date :subject:cc:to:from; bh=xSIjsO9YHgQmNhXDv/CpHxS0X0MZqkzEZSv/l1JGb+0=; b=U2LyDe3bcEaXNgBMnsCiZiYFJqWjrwTyKOVuo2JK9XF3hVUvyFLWJ6cTFGN5xT8KfS 1/QiV/85tiw1LapApCw/LXlz6/93MMIpedvnMHscrBsHSjx+f+EbK/xQ6FlfcmyqSMH2 o2yAkpHiVxjR9G8Q3BqWGIDIm4zalLqBpDjrXaZ4FtScIm60lHiG7aafs8kIzM1Rt6YP Z5BnqM20ZIEhE1OLjDbgOFXSJZmAfGstKDNE8GXlgoQ1Qb7Bem+NU7/AeqO7+MEQW/dS oW6uoz0NDOlnfsQriTz+CzAPJq156MVDYIgZQ+LNQFWUR4BhRuuTkBS7v0bfEkTi9XIv SqWw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=puri.sm Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id bp20si14043440lfb.242.2021.09.14.05.21.03; Tue, 14 Sep 2021 05:21:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=puri.sm Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232613AbhINMUY (ORCPT + 99 others); Tue, 14 Sep 2021 08:20:24 -0400 Received: from comms.puri.sm ([159.203.221.185]:45048 "EHLO comms.puri.sm" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232598AbhINMUU (ORCPT ); Tue, 14 Sep 2021 08:20:20 -0400 Received: from localhost (localhost [127.0.0.1]) by comms.puri.sm (Postfix) with ESMTP id 3622FDF8A6; Tue, 14 Sep 2021 05:18:32 -0700 (PDT) Received: from comms.puri.sm ([127.0.0.1]) by localhost (comms.puri.sm [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5Rcdb0T1Wqwb; Tue, 14 Sep 2021 05:18:31 -0700 (PDT) From: Sebastian Krzyszkowiak To: Sebastian Reichel , linux-pm@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Dirk Brandewie , kernel@puri.sm, Sebastian Krzyszkowiak , stable@vger.kernel.org Subject: [PATCH v2 1/2] power: supply: max17042_battery: Clear status bits in interrupt handler Date: Tue, 14 Sep 2021 14:18:05 +0200 Message-Id: <20210914121806.1301131-1-sebastian.krzyszkowiak@puri.sm> Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The gauge requires us to clear the status bits manually for some alerts to be properly dismissed. Previously the IRQ was configured to react only on falling edge, which wasn't technically correct (the ALRT line is active low), but it had a happy side-effect of preventing interrupt storms on uncleared alerts from happening. Fixes: 7fbf6b731bca ("power: supply: max17042: Do not enforce (incorrect) interrupt trigger type") Cc: Signed-off-by: Sebastian Krzyszkowiak --- v2: added a comment on why it clears all alert bits --- drivers/power/supply/max17042_battery.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/power/supply/max17042_battery.c b/drivers/power/supply/max17042_battery.c index 8dffae76b6a3..da78ffe6a3ec 100644 --- a/drivers/power/supply/max17042_battery.c +++ b/drivers/power/supply/max17042_battery.c @@ -876,6 +876,10 @@ static irqreturn_t max17042_thread_handler(int id, void *dev) max17042_set_soc_threshold(chip, 1); } + /* we implicitly handle all alerts via power_supply_changed */ + regmap_clear_bits(chip->regmap, MAX17042_STATUS, + 0xFFFF & ~(STATUS_POR_BIT | STATUS_BST_BIT)); + power_supply_changed(chip->battery); return IRQ_HANDLED; } -- 2.33.0