Received: by 2002:a05:6a11:4021:0:0:0:0 with SMTP id ky33csp874958pxb; Tue, 14 Sep 2021 10:32:26 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyfMcKR3lY6I0V1YEby/dASTICIGqfeu73jsDFVi4XXdX206P2BTppmehx/N/B4Fblt7aai X-Received: by 2002:a05:6638:22d1:: with SMTP id j17mr13483457jat.129.1631640746089; Tue, 14 Sep 2021 10:32:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631640746; cv=none; d=google.com; s=arc-20160816; b=pl5/hSuJZIoG8Bq0MxCueSH7SZSoAh8hPS4w03lyI5LHbbx0zaKNurlsV0seHn346U WRH8gy8aFfJGTIb9sbUTllt4wFyVRAVV2XM6zG28BBWDuibu8yWxAcmcdc8poms0p9Gb cDUsefvsbuBQ+08dfCGX0otTKL6O+TsbZ9+lPgBW8jmUMKKVrmteBgmO/nBvLkT4fzs2 O5x5sQp0Mb8euRx2x0bPfKfnjzmld0yu+NrHIkiz7G9PCHUn9lBkCLK79+IrtuHnGL53 k9oP7KAoYRxKrIdXS45J44GLVjkmIG+JGXQsMOrUU5v2tgyDUrwscbPftl6BmrWMcqn1 9wUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :organization:references:in-reply-to:message-id:subject:cc:to:from :date; bh=qszLIHRW8zafncviekVYwhSPK08ExIXkQRUYdOY+Yrs=; b=l8lIhPzM18Qyt0Gkm3da9v4RHK6LfZbsUccQ6Fj/nNClhIuBLsLzxIOE+N7w0rS+I+ h/CWwFF7hqRfxLk6ELsDGaF8WwXSINjR8GlrV1lLTjJKcq9F/6iYwg1/s+E0cpQaUyDN C0AHO4RLll4cG2TTZRvQn97WtOTZJo4NNovAgHL11zy+R8XsgnPH6vwx+e14l4YZa/KW T4Q0fwvxCYTAE6CDV9iYHaysQ0VjeviSNTD74VO6Yc5c0EfeNeF5uEUa1Zpby3ZqK3NO M0oYh+E3tiVA8tIDf8tHSn6X4a0jsDeJRp3ZQBSxID9SqIq97MT7KJY315nyhxj0FPfO tZDA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id t195si12237277iof.69.2021.09.14.10.31.59; Tue, 14 Sep 2021 10:32:26 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231311AbhINRca convert rfc822-to-8bit (ORCPT + 99 others); Tue, 14 Sep 2021 13:32:30 -0400 Received: from relay4-d.mail.gandi.net ([217.70.183.196]:36093 "EHLO relay4-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229464AbhINRc3 (ORCPT ); Tue, 14 Sep 2021 13:32:29 -0400 Received: (Authenticated sender: miquel.raynal@bootlin.com) by relay4-d.mail.gandi.net (Postfix) with ESMTPSA id 59185E0008; Tue, 14 Sep 2021 17:31:09 +0000 (UTC) Date: Tue, 14 Sep 2021 19:31:08 +0200 From: Miquel Raynal To: Richard Weinberger Cc: Bert Vermeulen , Vignesh Raghavendra , Patrice Chotard , Boris Brezillon , Christophe Kerello , Mark Brown , Alexander Lobakin , linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org Subject: Re: [PATCH v2] mtd: spinand: Add support for Etron EM73D044VCx Message-ID: <20210914193108.78df5367@xps13> In-Reply-To: <20210908201624.237634-1-bert@biot.com> References: <20210908201624.237634-1-bert@biot.com> Organization: Bootlin X-Mailer: Claws Mail 3.17.7 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Bert, Richard, a question for you below! bert@biot.com wrote on Wed, 8 Sep 2021 22:16:19 +0200: > This adds a new vendor Etron, and support for a 2Gb chip. > > The datasheet is available at > https://www.etron.com/cn/products/EM73%5B8%5DC%5BD_E_F%5DVC%20SPI%20NAND%20Flash_Promotion_Rev%201_00A.pdf > > Signed-off-by: Bert Vermeulen > --- > v2: > - Made ooblayout_free/_ecc depend on chip-specific parameters, instead of > hardcoded to this 2Gb chip only > - Fixed manufacturer ordering > - Fixed minor formatting issues as reported > - Removed debug comment > > drivers/mtd/nand/spi/Makefile | 2 +- > drivers/mtd/nand/spi/core.c | 1 + > drivers/mtd/nand/spi/etron.c | 104 ++++++++++++++++++++++++++++++++++ > include/linux/mtd/spinand.h | 1 + > 4 files changed, 107 insertions(+), 1 deletion(-) > create mode 100644 drivers/mtd/nand/spi/etron.c [...] > +static int etron_ecc_get_status(struct spinand_device *spinand, u8 status) > +{ > + switch (status & STATUS_ECC_MASK) { > + case STATUS_ECC_NO_BITFLIPS: > + return 0; > + > + case STATUS_ECC_HAS_BITFLIPS: > + /* Between 1-7 bitflips were corrected */ > + return 7; Mmmh this is a bit problematic, having no intermediate value means a single bitflip will trigger UBI to move the data around as its threshold will be reached. Richard, any feedback on this? > + > + case STATUS_ECC_MASK: > + /* Maximum bitflips were corrected */ > + return 8; > + > + case STATUS_ECC_UNCOR_ERROR: > + return -EBADMSG; > + } > + > + return -EINVAL; > +} Thanks, Miquèl