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Subject: Re: [PATCH v3 09/10] ARM: dts: at91: sama7g5: add node for the ADC
To:     Eugen Hristev <eugen.hristev@microchip.com>, <jic23@kernel.org>,
        <linux-iio@vger.kernel.org>, <devicetree@vger.kernel.org>
CC:     <linux-arm-kernel@lists.infradead.org>,
        <linux-kernel@vger.kernel.org>, <robh+dt@kernel.org>,
        <ludovic.desroches@microchip.com>
References: <20210901123013.329792-1-eugen.hristev@microchip.com>
 <20210901123013.329792-10-eugen.hristev@microchip.com>
From:   Nicolas Ferre <nicolas.ferre@microchip.com>
Organization: microchip
Message-ID: <069f7714-c4c6-ccf4-82d7-914dba5ea735@microchip.com>
Date:   Wed, 15 Sep 2021 11:16:55 +0200
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On 01/09/2021 at 14:30, Eugen Hristev wrote:
> Add node for the ADC controller in sama7g5 SoC.
> 
> Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>

Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>

> ---
>   arch/arm/boot/dts/sama7g5.dtsi | 16 ++++++++++++++++
>   1 file changed, 16 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi
> index f9ad5365862f..de960519c72a 100644
> --- a/arch/arm/boot/dts/sama7g5.dtsi
> +++ b/arch/arm/boot/dts/sama7g5.dtsi
> @@ -137,6 +137,22 @@ ps_wdt: watchdog@e001d180 {
>   			clocks = <&clk32k 0>;
>   		};
>   
> +		adc: adc@e1000000 {
> +			compatible = "microchip,sama7g5-adc";
> +			reg = <0xe1000000 0x200>;
> +			interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
> +			clocks = <&pmc PMC_TYPE_GCK 26>;
> +			assigned-clocks = <&pmc PMC_TYPE_GCK 26>;
> +			assigned-clock-rates = <100000000>;
> +			clock-names = "adc_clk";
> +			dmas = <&dma0 AT91_XDMAC_DT_PERID(0)>;
> +			dma-names = "rx";
> +			atmel,min-sample-rate-hz = <200000>;
> +			atmel,max-sample-rate-hz = <20000000>;
> +			atmel,startup-time-ms = <4>;
> +			status = "disabled";
> +		};
> +
>   		sdmmc0: mmc@e1204000 {
>   			compatible = "microchip,sama7g5-sdhci", "microchip,sam9x60-sdhci";
>   			reg = <0xe1204000 0x4000>;
> 


-- 
Nicolas Ferre