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[80.251.214.228]) by smtp.gmail.com with ESMTPSA id u10sm92513pjf.46.2021.09.15.08.12.40 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 15 Sep 2021 08:12:42 -0700 (PDT) Date: Wed, 15 Sep 2021 23:12:37 +0800 From: Shawn Guo To: Bjorn Andersson Cc: Stephen Boyd , Rob Herring , Loic Poulain , devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 1/3] clk: qcom: smd-rpm: Add rate hooks for clk_smd_rpm_branch_ops Message-ID: <20210915151236.GF25255@dragon> References: <20210914025554.5686-1-shawn.guo@linaro.org> <20210914025554.5686-2-shawn.guo@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 14, 2021 at 07:55:21PM -0700, Bjorn Andersson wrote: > On Mon 13 Sep 19:55 PDT 2021, Shawn Guo wrote: > > > On QCM2290 platform, the clock xo_board runs at 38400000, while the > > child clock bi_tcxo needs to run at 19200000. That said, > > clk_smd_rpm_branch_ops needs the capability of setting rate. Add rate > > hooks into clk_smd_rpm_branch_ops to make it possible. > > > > Most platforms has a crystal oscillator ticking at 38.4MHz feeding the > PMIC (represented by the rpmcc and its "xo" parent) and out comes the > bi_tcxo with a fixed 19.2MHz rate. Yeah, but all those platforms are running clk-rpmh driver, I think. > Is there a problem with the way sdm660_bi_tcxo is defined in this > regard? There is no problem if xo clock is 19.2MHz, but for platforms with 38.4MHz xo, bi_tcxo will be seen as 38.4MHz in clock tree, while we expect it to be 19.2MHz. Shawn