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Subject: Re: [PATCH v2 00/15] PHY: Add support for multilink configurations in
 Cadence Sierra PHY driver
To:     Swapnil Jakhade <sjakhade@cadence.com>, <vkoul@kernel.org>,
        <kishon@ti.com>, <robh+dt@kernel.org>, <p.zabel@pengutronix.de>,
        <linux-phy@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
        <devicetree@vger.kernel.org>
CC:     <mparab@cadence.com>, <lokeshvutla@ti.com>
References: <20210908122930.10224-1-sjakhade@cadence.com>
From:   Aswath Govindraju <a-govindraju@ti.com>
Message-ID: <23a8f4d9-3467-1cf5-eec7-a4d33fe03458@ti.com>
Date:   Wed, 15 Sep 2021 20:43:37 +0530
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On 08/09/21 5:59 pm, Swapnil Jakhade wrote:
> Cadence Sierra PHY is a multiprotocol PHY supporting different multilink
> PHY configurations. This patch series extends functionality of Sierra PHY
> driver by adding features like support for multilink multiprotocol
> configurations, derived reference clock etc.
> 
> The changes have been validated on TI J721E platform.
> 
> Version History:
> 
> v2:
>    - Added a new patch 3/15 to rename the SSC macros for dt-bindings
>      to use generic names. These macros are not yet used in any DTS file.
> 
> Swapnil Jakhade (15):
>   phy: cadence: Sierra: Use of_device_get_match_data() to get driver
>     data
>   phy: cadence: Sierra: Prepare driver to add support for multilink
>     configurations
>   dt-bindings: phy: cadence-torrent: Rename SSC macros to use generic
>     names
>   dt-bindings: phy: cadence-sierra: Add binding to specify SSC mode
>   phy: cadence: Sierra: Add support to get SSC type from device tree
>   phy: cadence: Sierra: Rename some regmap variables to be in sync with
>     Sierra documentation
>   phy: cadence: Sierra: Add PHY PCS common register configurations
>   phy: cadence: Sierra: Check cmn_ready assertion during PHY power on
>   phy: cadence: Sierra: Check PIPE mode PHY status to be ready for
>     operation
>   phy: cadence: Sierra: Update single link PCIe register configuration
>   phy: cadence: Sierra: Fix to get correct parent for mux clocks
>   phy: cadence: Sierra: Add support for PHY multilink configurations
>   phy: cadence: Sierra: Add PCIe + QSGMII PHY multilink configuration
>   dt-bindings: phy: cadence-sierra: Add clock ID for derived reference
>     clock
>   phy: cadence: Sierra: Add support for derived reference clock output
> 

for the complete series,

Reviewed-by: Aswath Govindraju <a-govindraju@ti.com>

Thanks,
Aswath

>  .../bindings/phy/phy-cadence-sierra.yaml      |    9 +
>  .../bindings/phy/phy-cadence-torrent.yaml     |    4 +-
>  drivers/phy/cadence/phy-cadence-sierra.c      | 1299 +++++++++++++++--
>  include/dt-bindings/phy/phy-cadence.h         |    9 +-
>  4 files changed, 1226 insertions(+), 95 deletions(-)
>