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[23.128.96.18]) by mx.google.com with ESMTP id h20si2305816ejt.70.2021.09.15.23.09.16; Wed, 15 Sep 2021 23:09:40 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@chromium.org header.s=google header.b=Ak2Cz77s; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234418AbhIPGHM (ORCPT + 99 others); Thu, 16 Sep 2021 02:07:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231281AbhIPGHL (ORCPT ); Thu, 16 Sep 2021 02:07:11 -0400 Received: from mail-io1-xd2e.google.com (mail-io1-xd2e.google.com [IPv6:2607:f8b0:4864:20::d2e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 16F46C061574 for ; Wed, 15 Sep 2021 23:05:52 -0700 (PDT) Received: by mail-io1-xd2e.google.com with SMTP id f6so6657858iox.0 for ; Wed, 15 Sep 2021 23:05:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=MRejp9fBUz75pPpYulgRWk+QeXX34u+JOl4cIXv0kwQ=; b=Ak2Cz77sR13TPwLNmj+ejAQtCOz/tpJM5fKa5WU3P2XhhZ1SBjSoZpPzRyKtqaG4UW /Rw+8IS752mpR+6WXOLd8JORjuV/CeG9o1TMuRFFKusIO1Mhtwpt8I4vtmkaoGS0xrKz DSHXfqZKE/MU93UvjSuOnJtR0YqkWqkN7Qnso= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=MRejp9fBUz75pPpYulgRWk+QeXX34u+JOl4cIXv0kwQ=; b=n2LjlFgiSmgp/RyH0zbsx6UhRJvvPQyadsrtaI8/hpAcWrdWYwunjTtdqrzIO9mCQz gMrA05JWuQo5hHrvTuYqxI51TRWDK7bUdoVOhSAHFDdUJ3igJdMNLQWO53z6NQZEu2FD UN1Aq7MgfGkOPDcMPQtlh+70HQX6ou5/1X3XMeoqAwDFEoWSIPC4YVN0Iil7q0wW1aTG tuDKv8KvJuuo5wEY76ONOYmthJP+CdgL4t0QmbqjdmL9/uwutuOjQeDhoZUC1GnJ1TtG 3WlQx+M7o7RpiCBWo72/QWxMEig4D0WFiiojTCM2R71Rhv+iTS12R7JvMqZ42mwSEsyS 3VEA== X-Gm-Message-State: AOAM530HMhdkZXWB9hzQEo6NnMPPlHmnWbOlRuzQFP95V957WbCCb5xo 8AmU6sW33ceGSKrgEI+4KH1QPfPyXn6tW1l47jVmwQ== X-Received: by 2002:a05:6602:1493:: with SMTP id a19mr3013814iow.55.1631772351387; Wed, 15 Sep 2021 23:05:51 -0700 (PDT) MIME-Version: 1.0 References: <20210825102632.601614-1-enric.balletbo@collabora.com> <20210825122613.v3.6.I15e2419141a69b2e5c7e700c34d92a69df47e04d@changeid> In-Reply-To: <20210825122613.v3.6.I15e2419141a69b2e5c7e700c34d92a69df47e04d@changeid> From: Hsin-Yi Wang Date: Thu, 16 Sep 2021 14:05:25 +0800 Message-ID: Subject: Re: [PATCH v3 6/7] soc: mediatek: mmsys: Add reset controller support To: Enric Balletbo i Serra Cc: lkml , Matthias Brugger , "moderated list:ARM/Mediatek SoC support" , Jitao Shi , Eizan Miyamoto , Nicolas Boichat , Chun-Kuang Hu , Collabora Kernel ML , Philipp Zabel , "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Aug 25, 2021 at 6:26 PM Enric Balletbo i Serra wrote: > > Among other features the mmsys driver should implement a reset > controller to be able to reset different bits from their space. > > Cc: Jitao Shi > Suggested-by: Chun-Kuang Hu > Signed-off-by: Enric Balletbo i Serra > Reviewed-by: Philipp Zabel > --- > > (no changes since v1) > > +static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned long id, > + bool assert) > +{ > + struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys, rcdev); > + unsigned long flags; > + u32 reg; > + int i; This variable is not used. > + > + spin_lock_irqsave(&mmsys->lock, flags); > + > + reg = readl_relaxed(mmsys->regs + MMSYS_SW0_RST_B); > + > + if (assert) > + reg &= ~BIT(id); > + else > + reg |= BIT(id); > + > + writel_relaxed(reg, mmsys->regs + MMSYS_SW0_RST_B); > + > + spin_unlock_irqrestore(&mmsys->lock, flags); > + > + return 0; > +} > +