Received: by 2002:a05:6a11:4021:0:0:0:0 with SMTP id ky33csp1342991pxb; Thu, 16 Sep 2021 05:35:56 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwcgkZI3X51/6ttESHvIyq0N/KbZ2G/+jJ3xRZhh74qwINbIoir6OOo/rkns62In7gLNOgQ X-Received: by 2002:a6b:8e50:: with SMTP id q77mr4109475iod.96.1631795756452; Thu, 16 Sep 2021 05:35:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631795756; cv=none; d=google.com; s=arc-20160816; b=Oi+Ceq08hFBc+y80/wWMGmR8KOgOvaYFYxZ+qP1R3JoLpeFSYZ1LPlDy7xzLBjic6m dufGaLPEmsf0cnVZss9BvBEm/UvBFtnWmbgEc0kxpRG8BbyCLwkPpJBXqcUH4xTIEG+d 1t7sgHWMCSPRnNDko/x7XzHWRB3is6STK7fenuxPIHxmG7eaM4y4/6pZ0KfT+hzel7Ls bbnwuI+Ea184kuhq0Q5Q8pjdeAMUQjUeIN2pdLMUp+Q/JdlGcP1bh27C0OdNnu2a2CWY x+6Yo2dHH1EaevciZ9niQHeUu5EFanoxXQiSdFFFVe0zeavMac+QnXgI6m8oNbsLUrEv mQyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=EA7THgHbeiqBnxwcV+FXYhZch8ba8SQmL7t+zmSxZ3Y=; b=GrDwHmIzRzOCkNbetlfZ7N4BGWnVlWRx1MCKbx5XZcqAWGo/mYN49gNCZm6Yy1G4kE oYOwDgbgaudRQV8dIUCoaWm62A57xuAe4pduM80/Y7fCMHCn56InwVt0Ll4FJDwtPaPF +4cOgqszREwrB/SH1L/XPm1YrZWQcqK+dbC4E5FsIYlfI7CYCOOsiXZ67aYXBJB6WPe8 M8qO1mt0PA0B/GyHQ1+lY4Ub06zxUI9AChhhLbdjVB8WxJ1bOTdZphj734hdW2ykHH0t nRNBJPQLzZMF81p5Nh1T2JqUBa9+x1l8MtWWQy7MKx6iJXy6Vaubhj6/czfidA0hRIAN fMRw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id s16si2376899ilh.179.2021.09.16.05.35.44; Thu, 16 Sep 2021 05:35:56 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235801AbhIPMem (ORCPT + 99 others); Thu, 16 Sep 2021 08:34:42 -0400 Received: from mail.kernel.org ([198.145.29.99]:39008 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230299AbhIPMel (ORCPT ); Thu, 16 Sep 2021 08:34:41 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 61DC760231; Thu, 16 Sep 2021 12:33:19 +0000 (UTC) From: Huacai Chen To: Thomas Gleixner , Marc Zyngier Cc: linux-kernel@vger.kernel.org, Xuefeng Li , Huacai Chen , Jiaxun Yang , Huacai Chen Subject: [PATCH V5 01/10] irqchip: Adjust Kconfig for Loongson Date: Thu, 16 Sep 2021 20:31:29 +0800 Message-Id: <20210916123138.3490474-2-chenhuacai@loongson.cn> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20210916123138.3490474-1-chenhuacai@loongson.cn> References: <20210916123138.3490474-1-chenhuacai@loongson.cn> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org We are preparing to add new Loongson (based on LoongArch, not compatible with old MIPS-based Loongson) support. HTVEC will be shared by both old and new Loongson processors, so we adjust its description. HTPIC is only used by MIPS-based Loongson, so we add a MIPS dependency. PCH_PIC and PCH_MSI will have some arch-specific code, so we remove the COMPILE_TEST dependency to avoid build warnings. Signed-off-by: Huacai Chen --- drivers/irqchip/Kconfig | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 4d5924e9f766..084bc4c2eebd 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -539,7 +539,7 @@ config LOONGSON_LIOINTC config LOONGSON_HTPIC bool "Loongson3 HyperTransport PIC Controller" - depends on MACH_LOONGSON64 + depends on (MACH_LOONGSON64 && MIPS) default y select IRQ_DOMAIN select GENERIC_IRQ_CHIP @@ -547,16 +547,16 @@ config LOONGSON_HTPIC Support for the Loongson-3 HyperTransport PIC Controller. config LOONGSON_HTVEC - bool "Loongson3 HyperTransport Interrupt Vector Controller" + bool "Loongson HyperTransport Interrupt Vector Controller" depends on MACH_LOONGSON64 default MACH_LOONGSON64 select IRQ_DOMAIN_HIERARCHY help - Support for the Loongson3 HyperTransport Interrupt Vector Controller. + Support for the Loongson HyperTransport Interrupt Vector Controller. config LOONGSON_PCH_PIC bool "Loongson PCH PIC Controller" - depends on MACH_LOONGSON64 || COMPILE_TEST + depends on MACH_LOONGSON64 default MACH_LOONGSON64 select IRQ_DOMAIN_HIERARCHY select IRQ_FASTEOI_HIERARCHY_HANDLERS @@ -565,7 +565,7 @@ config LOONGSON_PCH_PIC config LOONGSON_PCH_MSI bool "Loongson PCH MSI Controller" - depends on MACH_LOONGSON64 || COMPILE_TEST + depends on MACH_LOONGSON64 depends on PCI default MACH_LOONGSON64 select IRQ_DOMAIN_HIERARCHY -- 2.27.0