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[23.128.96.18]) by mx.google.com with ESMTP id s18si7305096eji.59.2021.09.17.02.44.42; Fri, 17 Sep 2021 02:45:05 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=t7YII+Zh; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240620AbhIPWBl (ORCPT + 99 others); Thu, 16 Sep 2021 18:01:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38660 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240317AbhIPWBk (ORCPT ); Thu, 16 Sep 2021 18:01:40 -0400 Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E2E6C061574 for ; Thu, 16 Sep 2021 15:00:19 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id t10so18582825lfd.8 for ; Thu, 16 Sep 2021 15:00:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=dYxeJw3YeroKM6/An6mAzn8eNYhfCfCV9PLV4I2gARI=; b=t7YII+ZhPDFrUSuyjj/fygY3MZuzQ0NBeg5Jm+cGpkkAxKRk6mz+oZBoYdLMxrGD8f bce8gYPfEo2LLAfWW/NbYCCAT4Hh951rBha3l6ooqSOwIDl/piwRyOTVTwg4bid5UXhI vs6z1Js41owlA8Q3UKEtCQs9OKjHn0yySjG45s+2KYrZGVH+XRgpFJAfOk0WKu9Wiu3A JwpnZnYRXL4QsBUklB2PMTUoHaYQB5XbuQZ9fWmAAW0oE+59iXGWQh3tnxPDavT+WV0h 0wDfoyYf/FyBquJKGvwT5lEYJKL7KtGgcgdJU/bKtEYVgORcs/UvQF3fkyKymAmuhlQu oExg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=dYxeJw3YeroKM6/An6mAzn8eNYhfCfCV9PLV4I2gARI=; b=M0+B/EMlLOfsikfCo8gb/3b0nl20K9aNUvjqaDqqA+ZVY2CNZbPqitzcbm46G4etZK HW+jPkaY+6mRct03KLSYJJkoHtq0ZpDw6HSG4zFSTE8GrtKzA2yHzYXyyScZ9zDktxCb S8bIvEIn5eSGyZv88qtfaHw6vs75sDqlc+JsE4Kgsz1k8JkKci8gkPuBmZ00xQMH+57u OxtsAKDvw27eVQfeWBQOJVUACnocBTHrkLgtyBNqHQKwp7HQVjc+ChyrVyDrQEkx6urD wOTv5PTpqxz6zeV2Ji3nv0PAC7n9D4ilE/hZWeXfJe6cr1HVwduupopma4itwLsAEk+5 U0ag== X-Gm-Message-State: AOAM530ct1dkj8fP8WTi26UggTI3OsAggT2SSzd78IHwZgZ7QeycIcvL fKf0nuu+AS/uyDbcT/umpeea65tv+srdRF/XjSvNyA== X-Received: by 2002:a19:f249:: with SMTP id d9mr5716153lfk.229.1631829616694; Thu, 16 Sep 2021 15:00:16 -0700 (PDT) MIME-Version: 1.0 References: <20210824164801.28896-1-lakshmi.sowjanya.d@intel.com> <20210824164801.28896-16-lakshmi.sowjanya.d@intel.com> In-Reply-To: <20210824164801.28896-16-lakshmi.sowjanya.d@intel.com> From: Linus Walleij Date: Fri, 17 Sep 2021 00:00:05 +0200 Message-ID: Subject: Re: [RFC PATCH v1 15/20] pwm: Add capability for PWM Driver managed state To: "D, Lakshmi Sowjanya" , "thierry.reding@gmail.com" , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , Lee Jones , "open list:PWM SUBSYSTEM" Cc: "open list:GPIO SUBSYSTEM" , Bartosz Golaszewski , linux-kernel , Mark Gross , Andy Shevchenko , "Saha, Tamal" , bala.senthil@intel.com Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Aug 24, 2021 at 6:48 PM wrote: > From: Christopher Hall > > Add additional flag that can be set by drivers to indicate that the > driver will manage its own PWM state. When calling pwm_ops.apply the > driver applies the requested state change to the pwm_device reconciling, > if possible, any conflicting requests. > > Intel(R) Timed I/O devices support very limited PWM capabilities. The > duty cycle must always be 50% of the period. When changing one parameter > at a time through the sysfs interface, it isn't possible for the user or > the PWM subsystem to maintain this relation. > > Signed-off-by: Christopher Hall > Signed-off-by: Tamal Saha > Signed-off-by: Lakshmi Sowjanya D > Reviewed-by: Mark Gross These PWM changes clearly need to be reviewed by the PWM subsystem maintainers, and I think all of the output generation portions of this really need to go into the PWM subsystem. Yours, Linus Walleij