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[96.84.70.89]) by smtp.gmail.com with ESMTPSA id f5sm2764672ils.3.2021.09.16.17.52.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Sep 2021 17:52:47 -0700 (PDT) Received: (nullmailer pid 1489692 invoked by uid 1000); Fri, 17 Sep 2021 00:52:45 -0000 Date: Thu, 16 Sep 2021 19:52:45 -0500 From: Rob Herring To: Parshuram Thombare Cc: broonie@kernel.org, lukas@wunner.de, p.yadav@ti.com, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, jpawar@cadence.com, mparab@cadence.com, Konrad Kociolek Subject: Re: [PATCH v4 1/2] spi: cadence: add dt-bindings documentation for Cadence XSPI controller Message-ID: References: <1631534558-8102-1-git-send-email-pthombar@cadence.com> <1631534684-8273-1-git-send-email-pthombar@cadence.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1631534684-8273-1-git-send-email-pthombar@cadence.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Sep 13, 2021 at 02:04:44PM +0200, Parshuram Thombare wrote: > Add DT binding for Cadence's XSPI controller driver. > > Signed-off-by: Konrad Kociolek > Signed-off-by: Jayshri Pawar > Signed-off-by: Parshuram Thombare > --- > .../devicetree/bindings/spi/cdns,xspi.yaml | 77 ++++++++++++++++++++++ > 1 file changed, 77 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/cdns,xspi.yaml > > diff --git a/Documentation/devicetree/bindings/spi/cdns,xspi.yaml b/Documentation/devicetree/bindings/spi/cdns,xspi.yaml > new file mode 100644 > index 0000000..5ebede1 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/cdns,xspi.yaml > @@ -0,0 +1,77 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +# Copyright 2020-21 Cadence > +%YAML 1.2 > +--- > +$id: "http://devicetree.org/schemas/spi/cdns,xspi.yaml#" > +$schema: "http://devicetree.org/meta-schemas/core.yaml#" > + > +title: Cadence XSPI Controller > + > +maintainers: > + - Parshuram Thombare > + > +description: | > + The XSPI controller allows SPI protocol communication in > + single, dual, quad or octal wire transmission modes for > + read/write access to slaves such as SPI-NOR flash. > + > +allOf: > + - $ref: "spi-controller.yaml#" > + > +properties: > + compatible: > + const: cdns,xspi-nor > + > + reg: > + items: > + - description: address and length of the controller register set > + - description: address and length of the Slave DMA data port > + - description: address and length of the auxiliary registers > + > + reg-names: > + items: > + - const: xspi-iobase > + - const: xspi-sdmabase > + - const: xspi-auxbase 'xspi' and 'base' are redundant. So just io, sdma, and aux. > + > + interrupts: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + > +unevaluatedProperties: false > + > +examples: > + - | > + #include > + bus { > + #address-cells = <2>; > + #size-cells = <2>; > + > + xspi: spi@a0010000 { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "cdns,xspi-nor"; > + reg = <0x0 0xa0010000 0x0 0x10000>, > + <0x0 0xb0000000 0x0 0x10000>, > + <0x0 0xa0020000 0x0 0x10000>; Unless you are really using 64KB of registers, that wastes a bunch of virtual space which is limited on 32-bit platforms. > + reg-names = "xspi-iobase", "xspi-sdmabase", "xspi-auxbase"; > + interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-parent = <&gic>; > + > + flash@0 { > + compatible = "jedec,spi-nor"; > + spi-max-frequency = <75000000>; > + reg = <0>; > + }; > + > + flash@1 { > + compatible = "jedec,spi-nor"; > + spi-max-frequency = <75000000>; > + reg = <1>; > + }; > + }; > + }; > -- > 2.7.4 > >