Received: by 2002:a05:6a11:4021:0:0:0:0 with SMTP id ky33csp2464047pxb; Fri, 17 Sep 2021 10:17:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzjIF6HzkaU0saE9Y9MCsHukUAhHcTkLgRwctQlsboDm/1IQujkASKTxE+N0UZqnmEY3GJS X-Received: by 2002:a50:8d5b:: with SMTP id t27mr13708856edt.316.1631899049418; Fri, 17 Sep 2021 10:17:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631899049; cv=none; d=google.com; s=arc-20160816; b=XeqkfkIJ85NHwygsiP3TahlJS+6Fogblz4vvuOfpZ+xjF5/r7Aoz0NEsXZPK5oASGe +hzdjLPyp1/Mmp+WFvVBLtF1MZD52i0DfQkLy4n/4dxWf4mQl3fVRz5oBolQPfCJN0+b r3rn/QN5S459l8NDeA5U0Nf69BVS6LDBIgtlUGEe0nRG/3sOe767FWkBk60L5zGLbRnU IeWLwF9r7NYSiFH7KqWLpZX+ANQv1wAR95R6dPG4V1hHNqffDbPMJve3ek5vzk1tEE+x VYYoQDkqWefNqcLjVHu499143dQTLAT9pNm4a133tpthAk07aHQVcPtWENuMPikKDFkg aGuQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:references:in-reply-to:message-id :date:subject:cc:to:from:dkim-signature; bh=hCWrDSqZz1/MJx0Y2r+Vv1EF0PQcvg19mxnobpT+a9s=; b=uL97HDEgUWMTfBV66WaO4cG0bf08shwVR2tXgXG4RRFhfL4rPPjqrwLb6nvt9oMJz8 0A44zHIngeWNGQU4/ti0TvAFhwaNzn/1wVsBn1kaexXg+tmKscGsbwcS/aSB04bYiEtT kdbzifaMsUp55sMd2+DXDAoO0oiS6+FPeTabPiFC8JP9uy5xusMUiX5cJi36EySyJG1w YKybVoPz8ccE2/6h8GL6hGbuwRuapGN2EWzlukrZHm0Xd2MDlfefyiW8POw2Jg7Dy3mp st67tuORQnb2HeR6yxsksuYGBi1XLsihC/BbNGgUCqKF0Mpen3r85m4QUaSJsHtmfCKB ZEnw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=ZXwXe+ds; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id jy1si7641735ejc.140.2021.09.17.10.17.01; Fri, 17 Sep 2021 10:17:29 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@quicinc.com header.s=qcdkim header.b=ZXwXe+ds; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=quicinc.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234968AbhIQGfF (ORCPT + 99 others); Fri, 17 Sep 2021 02:35:05 -0400 Received: from alexa-out.qualcomm.com ([129.46.98.28]:56066 "EHLO alexa-out.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240745AbhIQGew (ORCPT ); Fri, 17 Sep 2021 02:34:52 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1631860411; x=1663396411; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=hCWrDSqZz1/MJx0Y2r+Vv1EF0PQcvg19mxnobpT+a9s=; b=ZXwXe+ds5Rair7nLlt9hWLmKFH1V7gE0hRilWp1Zd00MF0RV87l3JunP ADuFgVNAd6u+Pc6FaCSoXID3R5UkVtKLvdtEWS5L7MbXrDfmeDStz1TsR 02r06AzGMcbLdZhpsCzG2XxtMnRfPWPZu7uAMgKMc3IZVGS5oYJLBS3tP s=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 16 Sep 2021 23:33:31 -0700 X-QCInternal: smtphost Received: from nalasex01a.na.qualcomm.com ([10.47.209.196]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2021 23:33:31 -0700 Received: from fenglinw-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.922.7; Thu, 16 Sep 2021 23:33:29 -0700 From: Fenglin Wu To: , , CC: , , Subject: [RESEND PATCH v1 8/9] spmi: pmic-arb: make interrupt support optional Date: Fri, 17 Sep 2021 14:33:03 +0800 Message-ID: <1631860384-26608-9-git-send-email-quic_fenglinw@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1631860384-26608-1-git-send-email-quic_fenglinw@quicinc.com> References: <1631860384-26608-1-git-send-email-quic_fenglinw@quicinc.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: David Collins Make the support of PMIC peripheral interrupts optional for spmi-pmic-arb devices. This is useful in situations where SPMI address mapping is required without the need for IRQ support. Signed-off-by: David Collins Signed-off-by: Fenglin Wu --- drivers/spmi/spmi-pmic-arb.c | 45 +++++++++++++++++++++++++++----------------- 1 file changed, 28 insertions(+), 17 deletions(-) diff --git a/drivers/spmi/spmi-pmic-arb.c b/drivers/spmi/spmi-pmic-arb.c index 988204c..55fa981 100644 --- a/drivers/spmi/spmi-pmic-arb.c +++ b/drivers/spmi/spmi-pmic-arb.c @@ -1280,10 +1280,12 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) goto err_put_ctrl; } - pmic_arb->irq = platform_get_irq_byname(pdev, "periph_irq"); - if (pmic_arb->irq < 0) { - err = pmic_arb->irq; - goto err_put_ctrl; + if (of_find_property(pdev->dev.of_node, "interrupt-names", NULL)) { + pmic_arb->irq = platform_get_irq_byname(pdev, "periph_irq"); + if (pmic_arb->irq < 0) { + err = pmic_arb->irq; + goto err_put_ctrl; + } } err = of_property_read_u32(pdev->dev.of_node, "qcom,channel", &channel); @@ -1343,17 +1345,22 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) } } - dev_dbg(&pdev->dev, "adding irq domain\n"); - pmic_arb->domain = irq_domain_add_tree(pdev->dev.of_node, - &pmic_arb_irq_domain_ops, pmic_arb); - if (!pmic_arb->domain) { - dev_err(&pdev->dev, "unable to create irq_domain\n"); - err = -ENOMEM; - goto err_put_ctrl; + if (pmic_arb->irq > 0) { + dev_dbg(&pdev->dev, "adding irq domain\n"); + pmic_arb->domain = irq_domain_add_tree(pdev->dev.of_node, + &pmic_arb_irq_domain_ops, pmic_arb); + if (!pmic_arb->domain) { + dev_err(&pdev->dev, "unable to create irq_domain\n"); + err = -ENOMEM; + goto err_put_ctrl; + } + + irq_set_chained_handler_and_data(pmic_arb->irq, + pmic_arb_chained_irq, pmic_arb); + } else { + dev_dbg(&pdev->dev, "not supporting PMIC interrupts\n"); } - irq_set_chained_handler_and_data(pmic_arb->irq, pmic_arb_chained_irq, - pmic_arb); err = spmi_controller_add(ctrl); if (err) goto err_domain_remove; @@ -1361,8 +1368,10 @@ static int spmi_pmic_arb_probe(struct platform_device *pdev) return 0; err_domain_remove: - irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL); - irq_domain_remove(pmic_arb->domain); + if (pmic_arb->irq > 0) { + irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL); + irq_domain_remove(pmic_arb->domain); + } err_put_ctrl: spmi_controller_put(ctrl); return err; @@ -1373,8 +1382,10 @@ static int spmi_pmic_arb_remove(struct platform_device *pdev) struct spmi_controller *ctrl = platform_get_drvdata(pdev); struct spmi_pmic_arb *pmic_arb = spmi_controller_get_drvdata(ctrl); spmi_controller_remove(ctrl); - irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL); - irq_domain_remove(pmic_arb->domain); + if (pmic_arb->irq > 0) { + irq_set_chained_handler_and_data(pmic_arb->irq, NULL, NULL); + irq_domain_remove(pmic_arb->domain); + } spmi_controller_put(ctrl); return 0; } -- 2.7.4