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To:     "'Stephen Boyd'" <swboyd@chromium.org>, <agross@kernel.org>,
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Subject: RE: [PATCH v3] arm64: dts: qcom: sc7280: Add WPSS remoteproc node
Date:   Fri, 17 Sep 2021 13:34:39 +0530
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> -----Original Message-----
> From: Stephen Boyd <swboyd@chromium.org>
> Sent: Friday, September 17, 2021 6:25 AM
> To: Rakesh Pillai <pillair@codeaurora.org>; agross@kernel.org;
> bjorn.andersson@linaro.org; robh+dt@kernel.org
> Cc: linux-arm-msm@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; sibis@codeaurora.org; mpubbise@codeaurora.org;
> kuabhs@chromium.org
> Subject: Re: [PATCH v3] arm64: dts: qcom: sc7280: Add WPSS remoteproc
> node
>=20
> Quoting Rakesh Pillai (2021-09-16 09:52:01)
> > diff --git a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
> > b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
> > index 64fc22a..2b8bbcd 100644
> > --- a/arch/arm64/boot/dts/qcom/sc7280-idp.dts
> > +++ b/arch/arm64/boot/dts/qcom/sc7280-idp.dts
> > @@ -1423,6 +1433,59 @@
> >                         #power-domain-cells =3D <1>;
> >                 };
> >
> > +               remoteproc_wpss: remoteproc@8a00000 {
> > +                       compatible =3D "qcom,sc7280-wpss-pil";
> > +                       reg =3D <0 0x08a00000 0 0x10000>;
> > +
> > +                       interrupts-extended =3D <&intc GIC_SPI 587
> IRQ_TYPE_EDGE_RISING>,
> > +                                             <&wpss_smp2p_in 0 =
IRQ_TYPE_EDGE_RISING>,
> > +                                             <&wpss_smp2p_in 1 =
IRQ_TYPE_EDGE_RISING>,
> > +                                             <&wpss_smp2p_in 2 =
IRQ_TYPE_EDGE_RISING>,
> > +                                             <&wpss_smp2p_in 3 =
IRQ_TYPE_EDGE_RISING>,
> > +                                             <&wpss_smp2p_in 7 =
IRQ_TYPE_EDGE_RISING>;
> > +                       interrupt-names =3D "wdog", "fatal", =
"ready", "handover",
> > +                                         "stop-ack", =
"shutdown-ack";
> > +
> > +                       clocks =3D <&gcc GCC_WPSS_AHB_BDG_MST_CLK>,
> > +                                <&gcc GCC_WPSS_AHB_CLK>,
> > +                                <&gcc GCC_WPSS_RSCP_CLK>,
> > +                                <&rpmhcc RPMH_CXO_CLK>;
> > +                       clock-names =3D "gcc_wpss_ahb_bdg_mst_clk",
> > +                                     "gcc_wpss_ahb_clk",
> > +                                     "gcc_wpss_rscp_clk",
> > +                                     "xo";
> > +
> > +                       power-domains =3D <&rpmhpd SC7280_CX>,
> > +                                       <&rpmhpd SC7280_MX>;
> > +                       power-domain-names =3D "cx", "mx";
> > +
> > +                       memory-region =3D <&wpss_mem>;
> > +
> > +                       qcom,qmp =3D <&aoss_qmp>;
> > +
> > +                       qcom,smem-states =3D <&wpss_smp2p_out 0>;
> > +                       qcom,smem-state-names =3D "stop";
> > +
> > +                       resets =3D <&aoss_reset =
AOSS_CC_WCSS_RESTART>,
> > +                                <&pdc_reset PDC_WPSS_SYNC_RESET>;
> > +                       reset-names =3D "restart", "pdc_sync";
> > +
> > +                       qcom,halt-regs =3D <&tcsr_mutex_regs =
0x37000>;
>=20
> Where is this node defined? I don't see it on the mailing list for =
sc7280. Can
> you indicate what patches this depends on, and use git format-patch =
--base=3D
> so we can try to find them ourselves.

Hi Stephen,
My bad, it shud be "tcsr_mutex" instead of "tcsr_mutex_regs".
I will correct it and send v4.