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[23.128.96.18]) by mx.google.com with ESMTP id d13si1005690ilr.79.2021.09.17.11.25.22; Fri, 17 Sep 2021 11:25:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241815AbhIQKDM (ORCPT + 99 others); Fri, 17 Sep 2021 06:03:12 -0400 Received: from mail.kernel.org ([198.145.29.99]:39986 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241821AbhIQKDI (ORCPT ); Fri, 17 Sep 2021 06:03:08 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 92AA560E76; Fri, 17 Sep 2021 10:01:46 +0000 (UTC) Received: from [198.52.44.129] (helo=wait-a-minute.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mRAgi-00BLLq-D1; Fri, 17 Sep 2021 11:01:44 +0100 Date: Fri, 17 Sep 2021 11:01:43 +0100 Message-ID: <87ilyzbjw8.wl-maz@kernel.org> From: Marc Zyngier To: "Sven Peter" Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, "Bjorn Helgaas" , "Rob Herring" , "Lorenzo Pieralisi" , Krzysztof =?UTF-8?B?V2lsY3p5xYRza2k=?= , "Alyssa Rosenzweig" , "Stan Skowronek" , "Mark Kettenis" , "Hector Martin" , "Robin Murphy" , kernel-team@android.com Subject: Re: [PATCH v3 09/10] iommu/dart: Exclude MSI doorbell from PCIe device IOVA range In-Reply-To: <479322ce-b0e4-40e4-831e-387415b4e310@www.fastmail.com> References: <20210913182550.264165-1-maz@kernel.org> <20210913182550.264165-10-maz@kernel.org> <479322ce-b0e4-40e4-831e-387415b4e310@www.fastmail.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 198.52.44.129 X-SA-Exim-Rcpt-To: sven@svenpeter.dev, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, bhelgaas@google.com, robh+dt@kernel.org, lorenzo.pieralisi@arm.com, kw@linux.com, alyssa@rosenzweig.io, stan@corellium.com, kettenis@openbsd.org, marcan@marcan.st, Robin.Murphy@arm.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 14 Sep 2021 14:54:07 +0100, "Sven Peter" wrote: > > > > On Mon, Sep 13, 2021, at 20:25, Marc Zyngier wrote: > > The MSI doorbell on Apple HW can be any address in the low 4GB > > range. However, the MSI write is matched by the PCIe block before > > hitting the iommu. It must thus be excluded from the IOVA range > > that is assigned to any PCIe device. > > > > Signed-off-by: Marc Zyngier > > It's not pretty but I'm not aware of any better solution and this should > work as long as these two are always paired. With the small nit below > addressed: > > Reviewed-by: Sven Peter > > > --- > > drivers/iommu/apple-dart.c | 25 +++++++++++++++++++++++++ > > drivers/pci/controller/Kconfig | 5 +++++ > > drivers/pci/controller/pcie-apple.c | 4 +++- > > 3 files changed, 33 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/iommu/apple-dart.c b/drivers/iommu/apple-dart.c > > index 559db9259e65..d1456663688e 100644 > > --- a/drivers/iommu/apple-dart.c > > +++ b/drivers/iommu/apple-dart.c > > @@ -721,6 +721,29 @@ static int apple_dart_def_domain_type(struct device *dev) > > return 0; > > } > > > > +#define DOORBELL_ADDR (CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR & PAGE_MASK) > > + > > +static void apple_dart_get_resv_regions(struct device *dev, > > + struct list_head *head) > > +{ > > +#ifdef CONFIG_PCIE_APPLE > > I think using IS_ENABLED would be better here in case the pcie > driver is built as a module which would then only define > CONFIG_PCIE_APPLE_MODULE AIUI. You're right, this isn't great. However, IS_ENABLED() still results in the evaluation of the following code by the compiler, even if it would be dropped by the optimiser. I resorted to the following construct: #ifndef CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR /* Keep things compiling when CONFIG_PCI_APPLE isn't selected */ #define CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR 0 #endif #define DOORBELL_ADDR (CONFIG_PCIE_APPLE_MSI_DOORBELL_ADDR & PAGE_MASK) static void apple_dart_get_resv_regions(struct device *dev, struct list_head *head) { if (IS_ENABLED(CONFIG_PCIE_APPLE) && dev_is_pci(dev)) { which is ugly, but works. The alternative is, of course, to add a new include file for one single value, which I find even worse. Thanks, M. -- Without deviation from the norm, progress is not possible.