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From:   Peter Geis <pgwipeout@gmail.com>
Date:   Fri, 17 Sep 2021 13:21:58 -0400
Message-ID: <CAMdYzYpo4mRqMRSF=chp4PhL609FKv_b3HHa0+7=ph2C_DfvuA@mail.gmail.com>
Subject: Re: [PATCH v1 0/3]
To:     Yifeng Zhao <yifeng.zhao@rock-chips.com>
Cc:     Heiko Stuebner <heiko@sntech.de>, Rob Herring <robh+dt@kernel.org>,
        devicetree <devicetree@vger.kernel.org>,
        Vinod Koul <vkoul@kernel.org>,
        Michael Riesch <michael.riesch@wolfvision.net>,
        "open list:ARM/Rockchip SoC..." <linux-rockchip@lists.infradead.org>,
        arm-mail-list <linux-arm-kernel@lists.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        linux-phy@lists.infradead.org,
        Kishon Vijay Abraham I <kishon@ti.com>,
        p.zabel@pengutronix.de
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On Thu, Aug 26, 2021 at 8:42 AM Yifeng Zhao <yifeng.zhao@rock-chips.com> wrote:
>
> Add Naneng combo PHY support for RK3568
>
> This phy can be used as pcie-phy, usb3-phy, sata-phy or sgmii-phy.

Good Afternoon,

Some feedback on this driver, for when you resend it to the mailing list.
I'm sending this against the cover letter since the mailing list
doesn't have the actual driver.

The driver doesn't work out of the box, you renamed the clocks but
missed one use point.
There's a lot of "magic numbers" that need to be defined.
Configuration could use some cleanup.
A parallel problem, if the PCIe phy fails to probe (because of the
aforementioned clock issue) the PCIe controller hard locks the board
during probe.

I look forward to version two.

Very Respectfully,
Peter Geis

>
>
>
> Yifeng Zhao (3):
>   dt-bindings: phy: rockchip: Add Naneng combo PHY bindings
>   phy/rockchip: add naneng combo phy for RK3568
>   arm64: dts: rockchip: add naneng combo phy nodes for rk3568
>
>  .../phy/phy-rockchip-naneng-combphy.yaml      | 100 +++
>  arch/arm64/boot/dts/rockchip/rk356x.dtsi      |  68 ++
>  drivers/phy/rockchip/Kconfig                  |   8 +
>  drivers/phy/rockchip/Makefile                 |   1 +
>  .../rockchip/phy-rockchip-naneng-combphy.c    | 646 ++++++++++++++++++
>  5 files changed, 823 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/phy/phy-rockchip-naneng-combphy.yaml
>  create mode 100644 drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
>
> --
> 2.17.1
>
>
>
>
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