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[23.128.96.18]) by mx.google.com with ESMTP id l4si25876037edj.282.2021.09.20.19.53.10; Mon, 20 Sep 2021 19:53:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linuxfoundation.org header.s=korg header.b=mhnHvNYr; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linuxfoundation.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354247AbhITSrz (ORCPT + 99 others); Mon, 20 Sep 2021 14:47:55 -0400 Received: from mail.kernel.org ([198.145.29.99]:56460 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1383335AbhITSoY (ORCPT ); Mon, 20 Sep 2021 14:44:24 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 1468A61AEB; Mon, 20 Sep 2021 17:32:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=linuxfoundation.org; s=korg; t=1632159159; bh=lbAZdGQWMdcvQ07c2MocX2Vj5WvDkupCf8fah3snmpE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mhnHvNYrX/PYuRikALl7iuzXdO+HOGb8eT3tDhdgXJqA5NQe9isLj9ERu/zlXdCzk CQMId04WtznCHsPazR8P8OMzPoAOU45Hz51W0pGN5/eMJ5RDQfBw+Z+ifyJIRY2Bjp hU+F+cLF2Ri3Dop4L9Hh1Z3IgGYKHX8M1mzzBlKU= From: Greg Kroah-Hartman To: linux-kernel@vger.kernel.org Cc: Greg Kroah-Hartman , stable@vger.kernel.org, Om Prakash Singh , Lorenzo Pieralisi , Bjorn Helgaas , Vidya Sagar , Sasha Levin Subject: [PATCH 5.14 096/168] PCI: tegra194: Fix MSI-X programming Date: Mon, 20 Sep 2021 18:43:54 +0200 Message-Id: <20210920163924.785962341@linuxfoundation.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210920163921.633181900@linuxfoundation.org> References: <20210920163921.633181900@linuxfoundation.org> User-Agent: quilt/0.66 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Om Prakash Singh [ Upstream commit 43537cf7e351264a1f05ed42ad402942bfc9140e ] Lower order MSI-X address is programmed in MSIX_ADDR_MATCH_HIGH_OFF DBI register instead of higher order address. This patch fixes this programming mistake. Link: https://lore.kernel.org/r/20210623100525.19944-3-omp@nvidia.com Signed-off-by: Om Prakash Singh Signed-off-by: Lorenzo Pieralisi Reviewed-by: Bjorn Helgaas Acked-by: Vidya Sagar Signed-off-by: Sasha Levin --- drivers/pci/controller/dwc/pcie-tegra194.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index fd14e2f45bba..55c8afb9a899 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -1763,7 +1763,7 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie) val = (ep->msi_mem_phys & MSIX_ADDR_MATCH_LOW_OFF_MASK); val |= MSIX_ADDR_MATCH_LOW_OFF_EN; dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_LOW_OFF, val); - val = (lower_32_bits(ep->msi_mem_phys) & MSIX_ADDR_MATCH_HIGH_OFF_MASK); + val = (upper_32_bits(ep->msi_mem_phys) & MSIX_ADDR_MATCH_HIGH_OFF_MASK); dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_HIGH_OFF, val); ret = dw_pcie_ep_init_complete(ep); -- 2.30.2