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Lu" Date: Tue, 21 Sep 2021 10:15:39 -0700 Message-ID: Subject: Re: [RFC 0/9] Linear Address Masking enabling To: Dmitry Vyukov Cc: "Kirill A. Shutemov" , "Kirill A. Shutemov" , Dave Hansen , Andy Lutomirski , Peter Zijlstra , "the arch/x86 maintainers" , Andrey Ryabinin , Alexander Potapenko , Catalin Marinas , Will Deacon , Andi Kleen , Linux-MM , LKML , "Carlos O'Donell" , Marco Elver , Taras Madan , "xiang1...@intel.com" Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Sep 21, 2021 at 9:52 AM Dmitry Vyukov wrote: > > On Sun, 7 Feb 2021 at 15:11, Kirill A. Shutemov wrote: > > > > On Sun, Feb 07, 2021 at 09:24:23AM +0100, Dmitry Vyukov wrote: > > > On Fri, Feb 5, 2021 at 4:16 PM Kirill A. Shutemov > > > wrote: > > > > > > > > Linear Address Masking[1] (LAM) modifies the checking that is applied to > > > > 64-bit linear addresses, allowing software to use of the untranslated > > > > address bits for metadata. > > > > > > > > The patchset brings support for LAM for userspace addresses. > > > > > > > > The most sensitive part of enabling is change in tlb.c, where CR3 flags > > > > get set. Please take a look that what I'm doing makes sense. > > > > > > > > The patchset is RFC quality and the code requires more testing before it > > > > can be applied. > > > > > > > > The userspace API is not finalized yet. The patchset extends API used by > > > > ARM64: PR_GET/SET_TAGGED_ADDR_CTRL. The API is adjusted to not imply ARM > > > > TBI: it now allows to request a number of bits of metadata needed and > > > > report where these bits are located in the address. > > > > > > > > There's an alternative proposal[2] for the API based on Intel CET > > > > interface. Please let us know if you prefer one over another. > > > > > > > > The feature competes for bits with 5-level paging: LAM_U48 makes it > > > > impossible to map anything about 47-bits. The patchset made these > > > > capability mutually exclusive: whatever used first wins. LAM_U57 can be > > > > combined with mappings above 47-bits. > > > > > > > > I include QEMU patch in case if somebody wants to play with the feature. > > > > > > Exciting! Do you plan to send the QEMU patch to QEMU? > > > > Sure. After more testing, once I'm sure it's conforming to the hardware. > > A follow up after H.J.'s LPC talk: > https://linuxplumbersconf.org/event/11/contributions/1010/ > (also +Carlos) > > As far as I understood, this kernel series depends on the Intel CET patches. > > Where are these compiler-rt patches that block gcc support? Hi Xiang, Please share your compiler-rt changes for LAM. -- H.J.