Received: by 2002:a05:6a11:4021:0:0:0:0 with SMTP id ky33csp96947pxb; Tue, 21 Sep 2021 19:57:42 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx93wC+8CIFsiZ+qRq7M7vKez1PUIeMKho95E0un0dO8kpNVIRfz8vZUtgJvGDbtLDN6yE8 X-Received: by 2002:a92:4a10:: with SMTP id m16mr24278465ilf.91.1632279462096; Tue, 21 Sep 2021 19:57:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1632279462; cv=none; d=google.com; s=arc-20160816; b=KosfSEvuKhBq6644yGVyuGyQMdeIPBfSY7KRS5RP+jVAFnI6j1UPg6Gg2MO822KnGH atDLvEbwgF14GAVoEVPJej4BZLb0CEo8fDP4tdHUdm3ukTnDzHsg62EwbyLygGie3Jml BVMJZ6fOf/RAgkyMLJrn+UrRogLWaBEtKlgq08+zik1V/B7APTDrB7wZH6pbQDkahM3V fq9Qk1vxZFFhRChpvibR0mJkD3vATYagdPIWvp7Hl2g418Pe1S4ADnLWY7QT2L/t0mJb iK7tKFmN1dIrfLpmM5m6FYLExK3TuDP0uRt4UXP8zS8dA2ZyLpzoqhikhlsF6M7dEQqe sjdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=CIgtfwilMARMi6DVU2fNk0s4yO6dBD26DTkJOMlQro4=; b=EmSfyNb2z0WACn5AgwOi42EMOjGUgo35YXRxE1VEJm0jPefV92a/jG1FAZ+ENIUgNM Ksm/X3GD4K/WK7I7LFWwsDVfYng2RuwM2TwGfc7IcqZrK05cLJ2R/wbxb39hf0i6K07M Volu/IqqF3PsSLB4Bfx2z2HPt2RVXZIUQ5KS4S4N+7Tu/NUp2a2rwZ7krIiRM7puA5Cz yPiVT+UTRvRe3PU3y+I5m8dddBvThFx/lhOnnWwqhFLKmCbFvH9Ff3c0uYVXD6biV4G4 CnWSbig5vYMF46So625C9YXJhRmLO8+6UV8NnlxCTNYQwa1lFgyeanb1mjmDAa/b5maO jbpA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id a5si990754ilc.109.2021.09.21.19.57.29; Tue, 21 Sep 2021 19:57:42 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230333AbhIVC6S (ORCPT + 99 others); Tue, 21 Sep 2021 22:58:18 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:33438 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S229909AbhIVC6R (ORCPT ); Tue, 21 Sep 2021 22:58:17 -0400 X-UUID: a28442aa6b7d4ab3b99021d83c1ae1c6-20210922 X-UUID: a28442aa6b7d4ab3b99021d83c1ae1c6-20210922 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 230019778; Wed, 22 Sep 2021 10:56:43 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 22 Sep 2021 10:56:42 +0800 Received: from localhost.localdomain (10.17.3.154) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 22 Sep 2021 10:56:41 +0800 From: Zhiyong Tao To: , , , , CC: , , , , , , , , , , , , , Rob Herring Subject: [PATCH v13 1/5] dt-bindings: pinctrl: mt8195: add rsel define Date: Wed, 22 Sep 2021 10:56:36 +0800 Message-ID: <20210922025640.11600-2-zhiyong.tao@mediatek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210922025640.11600-1-zhiyong.tao@mediatek.com> References: <20210922025640.11600-1-zhiyong.tao@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds rsel define for mt8195. Signed-off-by: Zhiyong Tao Acked-by: Rob Herring --- include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-bindings/pinctrl/mt65xx.h index 7e16e58fe1f7..f5934abcd1bd 100644 --- a/include/dt-bindings/pinctrl/mt65xx.h +++ b/include/dt-bindings/pinctrl/mt65xx.h @@ -16,6 +16,15 @@ #define MTK_PUPD_SET_R1R0_10 102 #define MTK_PUPD_SET_R1R0_11 103 +#define MTK_PULL_SET_RSEL_000 200 +#define MTK_PULL_SET_RSEL_001 201 +#define MTK_PULL_SET_RSEL_010 202 +#define MTK_PULL_SET_RSEL_011 203 +#define MTK_PULL_SET_RSEL_100 204 +#define MTK_PULL_SET_RSEL_101 205 +#define MTK_PULL_SET_RSEL_110 206 +#define MTK_PULL_SET_RSEL_111 207 + #define MTK_DRIVE_2mA 2 #define MTK_DRIVE_4mA 4 #define MTK_DRIVE_6mA 6 -- 2.25.1