Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
From:   Jiri Slaby <jslaby@suse.cz>
To:     gregkh@linuxfoundation.org
Cc:     linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org,
        Jiri Slaby <jslaby@suse.cz>
Subject: [PATCH 4/7] mxser: simplify FCR computation in mxser_change_speed()
Date:   Wed, 22 Sep 2021 09:59:35 +0200
Message-Id: <20210922075938.31390-4-jslaby@suse.cz>
In-Reply-To: <20210922075938.31390-1-jslaby@suse.cz>
References: <20210922075938.31390-1-jslaby@suse.cz>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit
Precedence: bulk

Provided FIFO is always enabled for MUST chips, move its FCR setting out
of PORT_8250/PORT_16450 special case in mxser_change_speed(). Now, we
can pre-set fcr to zero and invert the condition of the 'if'.

This makes the code more readable (no functional change intended).

Signed-off-by: Jiri Slaby <jslaby@suse.cz>
---
 drivers/tty/mxser.c | 47 +++++++++++++++++++--------------------------
 1 file changed, 20 insertions(+), 27 deletions(-)

diff --git a/drivers/tty/mxser.c b/drivers/tty/mxser.c
index 309acf3f1ec3..c194a96bb14e 100644
--- a/drivers/tty/mxser.c
+++ b/drivers/tty/mxser.c
@@ -600,33 +600,26 @@ static void mxser_change_speed(struct tty_struct *tty, struct ktermios *old_term
 	if (cflag & CMSPAR)
 		cval |= UART_LCR_SPAR;
 
-	if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
-		if (info->board->must_hwid) {
-			fcr = UART_FCR_ENABLE_FIFO;
-			fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
-			mxser_set_must_fifo_value(info);
-		} else
-			fcr = 0;
-	} else {
-		fcr = UART_FCR_ENABLE_FIFO;
-		if (info->board->must_hwid) {
-			fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
-			mxser_set_must_fifo_value(info);
-		} else {
-			switch (info->rx_high_water) {
-			case 1:
-				fcr |= UART_FCR_TRIGGER_1;
-				break;
-			case 4:
-				fcr |= UART_FCR_TRIGGER_4;
-				break;
-			case 8:
-				fcr |= UART_FCR_TRIGGER_8;
-				break;
-			default:
-				fcr |= UART_FCR_TRIGGER_14;
-				break;
-			}
+	fcr = 0;
+	if (info->board->must_hwid) {
+		fcr |= UART_FCR_ENABLE_FIFO |
+			MOXA_MUST_FCR_GDA_MODE_ENABLE;
+		mxser_set_must_fifo_value(info);
+	} else if (info->type != PORT_8250 && info->type != PORT_16450) {
+		fcr |= UART_FCR_ENABLE_FIFO;
+		switch (info->rx_high_water) {
+		case 1:
+			fcr |= UART_FCR_TRIGGER_1;
+			break;
+		case 4:
+			fcr |= UART_FCR_TRIGGER_4;
+			break;
+		case 8:
+			fcr |= UART_FCR_TRIGGER_8;
+			break;
+		default:
+			fcr |= UART_FCR_TRIGGER_14;
+			break;
 		}
 	}
 
-- 
2.33.0