Received: by 2002:a05:6a11:4021:0:0:0:0 with SMTP id ky33csp262893pxb; Wed, 22 Sep 2021 01:21:41 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyhOtVP9iSEMhcxBgJXF+0FY1ou7Y2I7KO9ndkleK+9siARC/nzBG2W2J/Q3OZkQFr3y2nC X-Received: by 2002:a05:6402:40c2:: with SMTP id z2mr40042050edb.340.1632298901661; Wed, 22 Sep 2021 01:21:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1632298901; cv=none; d=google.com; s=arc-20160816; b=msENu9HFbOG8pcfgdMwxnsM4xGK0RvjGGgTipJD//AfpnIZ5rAVucBzGTyqdWJkQl+ OWsDBOwMNUeVXPwp5+7VGNeqnc5Y8XfA66MRQSJq0Aw5045QtuQVErZZoisS6pWbYSOg Mv9a9i2aKiJrlNOBEpHEg19n6KOX8dCa64TcH580J9ZsIPksjrOfGcXHfJdetUVGefgz spiiB/4UWAhqYGXLYa3myTd2q1oELzEMCLLu4vtHrq8kGAUtacxzy9UZryRBpYRlVwPI dfYnUTZj0ZAAUtDHqYOZ5pI0rjsU43L7ddcjKY58I0PiLDap/OvwUQxDxZYc3cZ17The SqQg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=qjQFRrDUtxNiJiXNTejujNDmQ/qV4lpMuoqpzbBEEok=; b=Rco8OV16cN4KYXy7J2TLZayQBYjV4PNCwA2oaMNXEiHSJ7em8rWWSBKqEu2QGwjbtm 2kV3Bc1gdP9yPsIdAC89D7Ygzf2196QQ9F1L4ttrjd2kWRT032ELEiF5F6iwQQS8vbkg JeZw57oJdOvfLbZojONO/jGoXwc8+yAw7YLeCcTAwyzX0HMKhy2bvbVNG/hKBI3Iz94k o7jCVSlMOUT9mtR04g8PzojwWU+j9PYGtnPTCHbDj3tkjoSo2N0N8rGWO6s4YiP+IOz+ GjoExQTKEhW9KixRWpUqdiehvzQDj8YzUqHkfcPxx0bACIqBS+wEiZ26XX1dMRagPzLu LnbQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id s18si2289379eji.59.2021.09.22.01.21.18; Wed, 22 Sep 2021 01:21:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233427AbhIVISr (ORCPT + 99 others); Wed, 22 Sep 2021 04:18:47 -0400 Received: from twspam01.aspeedtech.com ([211.20.114.71]:22156 "EHLO twspam01.aspeedtech.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233759AbhIVISk (ORCPT ); Wed, 22 Sep 2021 04:18:40 -0400 Received: from mail.aspeedtech.com ([192.168.0.24]) by twspam01.aspeedtech.com with ESMTP id 18M7sdaB099790; Wed, 22 Sep 2021 15:54:39 +0800 (GMT-8) (envelope-from billy_tsai@aspeedtech.com) Received: from BillyTsai-pc.aspeed.com (192.168.2.149) by TWMBX02.aspeed.com (192.168.0.24) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 22 Sep 2021 16:14:57 +0800 From: Billy Tsai To: , , , , , , , , , , , , , CC: Subject: [v7 08/11] iio: adc: aspeed: Add func to set sampling rate. Date: Wed, 22 Sep 2021 16:15:17 +0800 Message-ID: <20210922081520.30580-9-billy_tsai@aspeedtech.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210922081520.30580-1-billy_tsai@aspeedtech.com> References: <20210922081520.30580-1-billy_tsai@aspeedtech.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-Originating-IP: [192.168.2.149] X-ClientProxiedBy: TWMBX02.aspeed.com (192.168.0.24) To TWMBX02.aspeed.com (192.168.0.24) X-DNSRBL: X-MAIL: twspam01.aspeedtech.com 18M7sdaB099790 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the function to set the sampling rate and keep the sampling period for a driver used to wait the fresh value. In addition, since the ADC clock is required when initializing the ADC device, move clk_prepare_enable ahead of the initialization phase. Signed-off-by: Billy Tsai --- drivers/iio/adc/aspeed_adc.c | 58 ++++++++++++++++++++++++------------ 1 file changed, 39 insertions(+), 19 deletions(-) diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c index a24be2a4f69c..f2226ba3144d 100644 --- a/drivers/iio/adc/aspeed_adc.c +++ b/drivers/iio/adc/aspeed_adc.c @@ -73,6 +73,12 @@ #define ASPEED_ADC_INIT_POLLING_TIME 500 #define ASPEED_ADC_INIT_TIMEOUT 500000 +/* + * When the sampling rate is too high, the ADC may not have enough charging + * time, resulting in a low voltage value. Thus, the default uses a slow + * sampling rate for most use cases. + */ +#define ASPEED_ADC_DEF_SAMPLING_RATE 65000 struct aspeed_adc_model_data { const char *model_name; @@ -96,6 +102,7 @@ struct aspeed_adc_data { struct clk_hw *clk_scaler; struct reset_control *rst; int vref_mv; + u32 sample_period_ns; }; #define ASPEED_CHAN(_idx, _data_reg_addr) { \ @@ -127,6 +134,24 @@ static const struct iio_chan_spec aspeed_adc_iio_channels[] = { ASPEED_CHAN(15, 0x2E), }; +static int aspeed_adc_set_sampling_rate(struct iio_dev *indio_dev, u32 rate) +{ + struct aspeed_adc_data *data = iio_priv(indio_dev); + + if (rate < data->model_data->min_sampling_rate || + rate > data->model_data->max_sampling_rate) + return -EINVAL; + /* Each sampling needs 12 clocks to convert.*/ + clk_set_rate(data->clk_scaler->clk, rate * ASPEED_CLOCKS_PER_SAMPLE); + rate = clk_get_rate(data->clk_scaler->clk); + data->sample_period_ns = DIV_ROUND_UP_ULL( + (u64)NSEC_PER_SEC * ASPEED_CLOCKS_PER_SAMPLE, rate); + dev_dbg(data->dev, "Adc clock = %d sample period = %d ns", rate, + data->sample_period_ns); + + return 0; +} + static int aspeed_adc_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, int *val2, long mask) @@ -157,17 +182,9 @@ static int aspeed_adc_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) { - struct aspeed_adc_data *data = iio_priv(indio_dev); - switch (mask) { case IIO_CHAN_INFO_SAMP_FREQ: - if (val < data->model_data->min_sampling_rate || - val > data->model_data->max_sampling_rate) - return -EINVAL; - - clk_set_rate(data->clk_scaler->clk, - val * ASPEED_CLOCKS_PER_SAMPLE); - return 0; + return aspeed_adc_set_sampling_rate(indio_dev, val); case IIO_CHAN_INFO_SCALE: case IIO_CHAN_INFO_RAW: @@ -392,6 +409,19 @@ static int aspeed_adc_probe(struct platform_device *pdev) if (ret) return ret; + ret = clk_prepare_enable(data->clk_scaler->clk); + if (ret) + return ret; + ret = devm_add_action_or_reset(data->dev, + aspeed_adc_clk_disable_unprepare, + data->clk_scaler->clk); + if (ret) + return ret; + ret = aspeed_adc_set_sampling_rate(indio_dev, + ASPEED_ADC_DEF_SAMPLING_RATE); + if (ret) + return ret; + adc_engine_control_reg_val = readl(data->base + ASPEED_REG_ENGINE_CONTROL); adc_engine_control_reg_val |= @@ -418,16 +448,6 @@ static int aspeed_adc_probe(struct platform_device *pdev) return ret; } - ret = clk_prepare_enable(data->clk_scaler->clk); - if (ret) - return ret; - - ret = devm_add_action_or_reset(data->dev, - aspeed_adc_clk_disable_unprepare, - data->clk_scaler->clk); - if (ret) - return ret; - /* Start all channels in normal mode. */ adc_engine_control_reg_val = readl(data->base + ASPEED_REG_ENGINE_CONTROL); -- 2.25.1