Received: by 2002:a05:6a11:4021:0:0:0:0 with SMTP id ky33csp305319pxb; Wed, 22 Sep 2021 02:35:39 -0700 (PDT) X-Google-Smtp-Source: ABdhPJylPoiPCa6UE33Esq0PYo4al1Vxg4AaDmU4jZx/StckGmOImUKjuKHYNj2TfVutGXZ3EacQ X-Received: by 2002:a02:ac01:: with SMTP id a1mr3951414jao.93.1632303339367; Wed, 22 Sep 2021 02:35:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1632303339; cv=none; d=google.com; s=arc-20160816; b=dQebdsNXjNaTlHp4Qr8tPD8+VqROhBraSDwkvXFCd/r8TH2HRtmAk++c0q4UWZEGVS I0Fwi2NKG0ReIcQG9UE0R6M5jszLn9SUgipqULi/SjB/b5Nf6SUvmR3rsLOnmDi+5nl6 0Ikfuom47D29aBsFByosflnWtQdA3REB5v4ur3ZdaLFc6ZQUvJ9GMvifGgQk+RJLc1KW ajS90V9jdPiDRzelzor7BzwcbldSmRzq8Kn9cSd5Hb2tEP4+GvHl0MnRhpvmGKTPp4Hv oof+hAqN/jTKFtpmnPILxaSmWK8+aKXmMinWq4V6uv/u8O8EBhFOWv/dUspLZHyw6yJw JwYQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:mime-version:message-id:date:subject:cc:to:from; bh=MSitSj+E3QIKyvEEG6U7kBNj6cv55FJOC0Wy3v1YPfw=; b=HBTYnvlIWUUC5GOUFghPdSv0ygnPTM6fiv9b3QL5fEinKo8Es2SgzE3Bo/8SDtoAGM gZBov2Zf2GuGZPkjg3VydPgC7IiOHm74Jhdz+IH7ysdjGi91U4golZVAnGUsY3otRltP corTRTUyVUF7RDZZlZ56z4fceAnmhLqEQItRiZMyz9+CqR5xQWzy2StLwmBhDNzu/NO3 68STbrUOeHt87crHV/nx2VYng+RLzTMHzFmm+NKgrFxkn0VJQUaLbnC5X9yegfwI+CaP WxS3VanXaoHbsDvTb0pJC5SJYkcgygE18LQThZapxzFkb626LNI9puhPmxo2HIraB3wh SqVg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id o6si2284551jat.103.2021.09.22.02.35.25; Wed, 22 Sep 2021 02:35:39 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234268AbhIVJer (ORCPT + 99 others); Wed, 22 Sep 2021 05:34:47 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:48952 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S233969AbhIVJep (ORCPT ); Wed, 22 Sep 2021 05:34:45 -0400 X-UUID: 7f99832f6fd841a2bdabcf8111f45b7b-20210922 X-UUID: 7f99832f6fd841a2bdabcf8111f45b7b-20210922 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 230712638; Wed, 22 Sep 2021 17:33:12 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Wed, 22 Sep 2021 17:33:11 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 22 Sep 2021 17:33:11 +0800 From: Seiya Wang To: Matthias Brugger , Rob Herring CC: , , , , Subject: [PATCH v4 0/1] Add basic node support for Mediatek MT8195 SoC Date: Wed, 22 Sep 2021 17:33:02 +0800 Message-ID: <20210922093303.23720-1-seiya.wang@mediatek.com> X-Mailer: git-send-email 2.14.1 MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org MT8195 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA55 and 4 CA78 cores. MT8195 share many HW IP with MT65xx series. This patchset was tested on MT8195 evaluation board to shell. Based on next-20210916 Changes in v4 Add clock, i2c, pwrap, xhci nodes Use clock driver instead of dummy clock Remove ufsphy node Changes in v3 Add spi and pinctrl nodes Changes in v2 Fix make dt_binding_check warning in mediatek,ufs-phy.yaml Update usb phy and ufs phy nodes in mt8195.dtsi Seiya Wang (1): arm64: dts: Add Mediatek SoC MT8195 and evaluation board dts and Makefile arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8195-evb.dts | 29 ++ arch/arm64/boot/dts/mediatek/mt8195.dtsi | 561 ++++++++++++++++++++++++++++ 3 files changed, 591 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8195-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8195.dtsi -- 2.14.1