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[23.128.96.18]) by mx.google.com with ESMTP id v20si1860253ejv.515.2021.09.22.03.24.15; Wed, 22 Sep 2021 03:24:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=zwgf5NRA; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234674AbhIVKXJ (ORCPT + 99 others); Wed, 22 Sep 2021 06:23:09 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234713AbhIVKXH (ORCPT ); Wed, 22 Sep 2021 06:23:07 -0400 Received: from mail-qk1-x72f.google.com (mail-qk1-x72f.google.com [IPv6:2607:f8b0:4864:20::72f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D5602C061756 for ; Wed, 22 Sep 2021 03:21:37 -0700 (PDT) Received: by mail-qk1-x72f.google.com with SMTP id t4so7626303qkb.9 for ; Wed, 22 Sep 2021 03:21:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=lL2DQUKgYky8J0s7D27IqBXnXuaSYyqrJtM1rXYOyrM=; b=zwgf5NRANcg1FFk/+b/lLclJ8ONE7GC0k5BLnCiNbr87/fyS39uHZB1UXIizDGcFR+ siqUo4Sb5QDy7YO6mXIc56oJ7kNab6kaUGuLJR1gPcjesfMKHYIHDdlQpN9u5kAfe7DJ +h61o9aaaFvVGBDu0XbWsfmui2ayWYJQsqd2gHSEDlTTD38UdFoT1GbIkpXjssdI+A/O V+iiWu0ZJQKDw8YXolelsoEWPcatfSoWoZcAf+3on+SatVxKN94WJsjMOk5/0HGftIZL u2y8RPvHeGT4hWk9PIFGJrCQIGolmkRfYw++Cn+tkqvb9B37CieH5G06c7VIoHHZMWDP 1qRA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=lL2DQUKgYky8J0s7D27IqBXnXuaSYyqrJtM1rXYOyrM=; b=VmAmWUnScS/HeqH1hZgij9ycxg25cdnEPA9c12sZ5pRWaprhPVdy9kpbip+GqMdX8n ccd45+tzZgg0nnj4CT4lMhRFXkVWlLzgSmvDozl40oBgKV68P5m5fnkZBJhTOxlIp0wU xpJInFVujUMnRRTAbvWtTsJ0yPMVKmQTexYs8mbSvF/etLFEDSpnCrDCFuSXXNOHswIq LPQGXNCWLtRUn0KKt1fzPxS++kuemua4HR3kJixoJh23A9pDz6JqZ6TKIA8BfXidrMHp PZD0qH4K/gqXtSNz6eoCbRnf4coTQDi8c5KgL8HDdj1eiP/8pWC84iKLUX1ReYar0HA9 DPtg== X-Gm-Message-State: AOAM533ewCW8Qei4CVaWixb7+VLr7fPz+lOQS1vYfI494QnZ76zj2MQI tjf680noLKf8lpgEvLW0yRwf/kIkV5LzsyFEun4jrQ== X-Received: by 2002:a25:cbc3:: with SMTP id b186mr42865524ybg.199.1632306097026; Wed, 22 Sep 2021 03:21:37 -0700 (PDT) MIME-Version: 1.0 References: <20210818081018.2620544-1-piyush.mehta@xilinx.com> <20210818081018.2620544-4-piyush.mehta@xilinx.com> <2286343a-e061-d5bb-b266-6f657cba63e2@xilinx.com> In-Reply-To: From: Bartosz Golaszewski Date: Wed, 22 Sep 2021 12:21:26 +0200 Message-ID: Subject: Re: [PATCH V3 3/3] gpio: modepin: Add driver support for modepin GPIO controller To: Michal Simek Cc: Piyush Mehta , Arnd Bergmann , Zou Wei , Greg KH , Linus Walleij , wendy.liang@xilinx.com, Nobuhiro Iwamatsu , Rob Herring , rajan.vaja@xilinx.com, linux-gpio , linux-devicetree , git , Srinivas Goud , arm-soc , LKML Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 22, 2021 at 12:18 PM Bartosz Golaszewski wrote: > > On Mon, Aug 23, 2021 at 10:14 AM Michal Simek wrote: > > > > Hi Bart, > > > > On 8/23/21 10:02 AM, Bartosz Golaszewski wrote: > > > On Wed, Aug 18, 2021 at 10:11 AM Piyush Mehta wrote: > > >> > > >> This patch adds driver support for the zynqmp modepin GPIO controller. > > >> GPIO modepin driver set and get the value and status of the PS_MODE pin, > > >> based on device-tree pin configuration. These four mode pins are > > >> configurable as input/output. The mode pin has a control register, which > > >> have lower four-bits [0:3] are configurable as input/output, next four-bits > > >> can be used for reading the data as input[4:7], and next setting the > > >> output pin state output[8:11]. > > >> > > >> Signed-off-by: Piyush Mehta > > >> Acked-by: Michal Simek > > >> Reviewed-by: Linus Walleij > > >> --- > > > > > > Which tree should this go through? > > > > I would prefer to go this via gpio tree. > > > > Thanks, > > Michal > > Sure, just make sure to get an Ack from Rob Herring on the DT bindings. > > Bart Nevermind - it's already there. Bart