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[23.128.96.18]) by mx.google.com with ESMTP id x8si2810718iom.11.2021.09.22.05.55.29; Wed, 22 Sep 2021 05:55:41 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@google.com header.s=20210112 header.b=juaKvmI2; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=REJECT sp=REJECT dis=NONE) header.from=google.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236045AbhIVM4U (ORCPT + 99 others); Wed, 22 Sep 2021 08:56:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34662 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236001AbhIVM4T (ORCPT ); Wed, 22 Sep 2021 08:56:19 -0400 Received: from mail-ot1-x332.google.com (mail-ot1-x332.google.com [IPv6:2607:f8b0:4864:20::332]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 65F68C061574 for ; Wed, 22 Sep 2021 05:54:49 -0700 (PDT) Received: by mail-ot1-x332.google.com with SMTP id c6-20020a9d2786000000b005471981d559so3292524otb.5 for ; Wed, 22 Sep 2021 05:54:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc:content-transfer-encoding; bh=6JUrlffSvJAPtpi9707YKMMX70rhvermhAZjCLNvyF4=; b=juaKvmI24xrZW83BOSCpjiaApyrsyKhBiUpjRv0Iu3mEgdhM9OaF5/1BqSmpVcIs6L aP6U6LN+qq9oX5udXR8H03TxtlQTEfxJF4YsEkUdLsd8JVrGvIOj017VBbQDLu7Nt8x6 y/SE5tQe/euXmI+DVfFhKQie9hCE9Aw2cp3Ug6/WtId57oAyCy3q0J3BiLWtZUeohKyU AL1FxJcOUJcmbjNcU7jAa+lQsa+6aCAZqTKzfy0f57bRq/fTTYXnp1FLBrimvxEAqxXm QrTS36dep77wTpWOQ0wNzBJT+fiZkIDFDT7siMH8Gvq064ltBPcV0Jq1NihUeQrnmQeS x6lw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=6JUrlffSvJAPtpi9707YKMMX70rhvermhAZjCLNvyF4=; b=y1U+qTodkyEo1Av14pQyy7IepjYOy1dx77yb0j6Mu9xUP9aHleX6ITAB/U4cnXEKai idC+Ka075rN8KTVEP1xA2i1+DK6bXoL9Svy1hHpP5/Q+3SM44pGBXnj2/BwvaGcRParG gjPQ/0HZZGFuy0syHt5uB1qKXivjy83hY3ie+LSeFF/CWk7V7ORpkHEsdAEwoDi3yUfb VZG/otlQezpIXG/1ZUX4jiTlf71kmmP5KPs1uei5Kqx/mvKxbfA3aQoZt/MgDIg8dM6W HlKei4b1blrhbCPj8j19h6zEzzCYY53eQWVM/xIs9+97FPw5m7yqWpeAqg52SJ9gvVpn /V7Q== X-Gm-Message-State: AOAM532zGdvdRt+al5B0eKmBrvNEVtjteEk+ilJzSh/Fccdld6wloB5Z wnGz0g0UIVw9Hy5xZQJSauAfz6Bmv2zvF2cF131tVw== X-Received: by 2002:a9d:7244:: with SMTP id a4mr31605681otk.137.1632315288467; Wed, 22 Sep 2021 05:54:48 -0700 (PDT) MIME-Version: 1.0 References: <20210205151631.43511-1-kirill.shutemov@linux.intel.com> <20210207141104.ikxbdxhoisgqaoio@box> In-Reply-To: From: Dmitry Vyukov Date: Wed, 22 Sep 2021 14:54:36 +0200 Message-ID: Subject: Re: [RFC 0/9] Linear Address Masking enabling To: "Zhang, Xiang1" Cc: "H.J. Lu" , "Kirill A. Shutemov" , "Kirill A. Shutemov" , Dave Hansen , "Lutomirski, Andy" , Peter Zijlstra , "the arch/x86 maintainers" , Andrey Ryabinin , Alexander Potapenko , Catalin Marinas , Will Deacon , Andi Kleen , Linux-MM , LKML , "Carlos O'Donell" , Marco Elver , Taras Madan Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 22 Sept 2021 at 03:15, Zhang, Xiang1 wrote= : > > There are already in llvm.org. > One of my old patch is https://reviews.llvm.org/D102472 which has been co= mmitted by https://reviews.llvm.org/D102901 and https://reviews.llvm.org/D= 109790 Hi Xiang, Good sanitizer patches are upstream! Please help me to understand the status of other pieces (H.J. you probably talked about this yesterday, but I wasn't able to build a complete picture during the talk, I think it will be useful to have this in written form). 1. The presentation mentions "GCC: enable memory tagging with LAM in x86 codegen". What exactly is needed? Isn't LAM transparent for codegen? What's the status in gcc? Does a corresponding change need to be done in llvm? 2. "Enable LAM in binutils". This is already upstream in binutils 2.36, right? 3. The mentioned glibc patch: http://patchwork.ozlabs.org/project/glibc/patch/20210211173711.71736-1-hjl.= tools@gmail.com/ Not upstream yet, targeting glibc 2.34. 4. "Avoid pointer operations incompatible with LAM. memmove: mask out memory tags before comparing pointers". Is this upstream? Where is the patch? Are there other similar patches? As a side note, regarding the memmove change: do we really need it? Memory regions can overlap only if they come from the same allocation/base object. If they come from different allocations, they can't overlap (undefined behavior already). 5. Do we need any additional enabling changes in clang/llvm? 6. The kernel patches (this email thread) depend on the CET patches (for the interface part only). And the CET patches is this, right? https://lore.kernel.org/linux-doc/?q=3Dx86%2Fcet%2Fshstk 7. Do I miss anything else? H.J. please upload your slides here: https://linuxplumbersconf.org/event/11/contributions/1010/ It would help with links and copy-pasting text. FTR here is the link to the Plumbers talk: https://youtu.be/zUw0ZVXCwoM?t=3D10456 Thank you > BR > Xiang > > -----Original Message----- > From: H.J. Lu > Sent: Wednesday, September 22, 2021 1:16 AM > To: Dmitry Vyukov > Cc: Kirill A. Shutemov ; Kirill A. Shutemov ; Dave Hansen ; Luto= mirski, Andy ; Peter Zijlstra ; the = arch/x86 maintainers ; Andrey Ryabinin ; Alexander Potapenko ; Catalin Marinas ; Will Deacon ; Andi Kleen ; Linux-MM ; LKML ; Ca= rlos O'Donell ; Marco Elver ; Taras Ma= dan ; Zhang, Xiang1 > Subject: Re: [RFC 0/9] Linear Address Masking enabling > > On Tue, Sep 21, 2021 at 9:52 AM Dmitry Vyukov wrote: > > > > On Sun, 7 Feb 2021 at 15:11, Kirill A. Shutemov = wrote: > > > > > > On Sun, Feb 07, 2021 at 09:24:23AM +0100, Dmitry Vyukov wrote: > > > > On Fri, Feb 5, 2021 at 4:16 PM Kirill A. Shutemov > > > > wrote: > > > > > > > > > > Linear Address Masking[1] (LAM) modifies the checking that is > > > > > applied to 64-bit linear addresses, allowing software to use of > > > > > the untranslated address bits for metadata. > > > > > > > > > > The patchset brings support for LAM for userspace addresses. > > > > > > > > > > The most sensitive part of enabling is change in tlb.c, where > > > > > CR3 flags get set. Please take a look that what I'm doing makes s= ense. > > > > > > > > > > The patchset is RFC quality and the code requires more testing > > > > > before it can be applied. > > > > > > > > > > The userspace API is not finalized yet. The patchset extends API > > > > > used by > > > > > ARM64: PR_GET/SET_TAGGED_ADDR_CTRL. The API is adjusted to not > > > > > imply ARM > > > > > TBI: it now allows to request a number of bits of metadata > > > > > needed and report where these bits are located in the address. > > > > > > > > > > There's an alternative proposal[2] for the API based on Intel > > > > > CET interface. Please let us know if you prefer one over another. > > > > > > > > > > The feature competes for bits with 5-level paging: LAM_U48 makes > > > > > it impossible to map anything about 47-bits. The patchset made > > > > > these capability mutually exclusive: whatever used first wins. > > > > > LAM_U57 can be combined with mappings above 47-bits. > > > > > > > > > > I include QEMU patch in case if somebody wants to play with the f= eature. > > > > > > > > Exciting! Do you plan to send the QEMU patch to QEMU? > > > > > > Sure. After more testing, once I'm sure it's conforming to the hardwa= re. > > > > A follow up after H.J.'s LPC talk: > > https://linuxplumbersconf.org/event/11/contributions/1010/ > > (also +Carlos) > > > > As far as I understood, this kernel series depends on the Intel CET pat= ches. > > > > Where are these compiler-rt patches that block gcc support? > > Hi Xiang, > > Please share your compiler-rt changes for LAM. > > -- > H.J.