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From:   Doug Anderson <dianders@chromium.org>
Date:   Wed, 22 Sep 2021 07:54:32 -0700
Message-ID: <CAD=FV=X=PUeahdf_bbTyCAZSeZ-ahRwZVvH-Oh=3wQmRxbt2CQ@mail.gmail.com>
Subject: Re: [PATCH V9 4/8] arm64: dts: sc7280: Add QUPv3 wrapper_0 nodes
To:     Rajesh Patil <rajpat@codeaurora.org>
Cc:     Stephen Boyd <swboyd@chromium.org>, Andy Gross <agross@kernel.org>,
        Bjorn Andersson <bjorn.andersson@linaro.org>,
        Rob Herring <robh+dt@kernel.org>,
        linux-arm-msm <linux-arm-msm@vger.kernel.org>,
        LKML <linux-kernel@vger.kernel.org>,
        "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
        <devicetree@vger.kernel.org>,
        Rajendra Nayak <rnayak@codeaurora.org>,
        Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org>,
        msavaliy@qti.qualcomm.com, satya priya <skakit@codeaurora.org>,
        Matthias Kaehlcke <mka@chromium.org>,
        Roja Rani Yarubandi <rojay@codeaurora.org>
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Precedence: bulk

Hi,

On Wed, Sep 22, 2021 at 5:31 AM <rajpat@codeaurora.org> wrote:
>
> >> +                       spi0: spi@980000 {
> >> +                               compatible = "qcom,geni-spi";
> >> +                               reg = <0 0x00980000 0 0x4000>;
> >> +                               clocks = <&gcc
> >> GCC_QUPV3_WRAP0_S0_CLK>;
> >> +                               clock-names = "se";
> >> +                               pinctrl-names = "default";
> >> +                               pinctrl-0 = <&qup_spi0_data_clk>,
> >> <&qup_spi0_cs>, <&qup_spi0_cs_gpio>;
> >
> > This should only have qup_spi0_data_clk and qup_spi0_cs, not
> > qup_spi0_cs_gpio. Both qup controlled and gpio controlled options are
> > provided in case a board wants to use the qup version of chipselect,
> > but
> > having them both used by default leads to conflicts and confusion. This
> > same comment applies to all spi pinctrl properties in this file. Please
> > keep the cs_gpio variants though so that boards can use them if they
> > want. They will be unused, but that's OK.
>
> Okay. Shall we remove only "<&qup_spiN_cs_gpio>" in each SPI node?

Right. So for this one:

pinctrl-0 = <&qup_spi0_data_clk>, <&qup_spi0_cs>;

-Doug