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From:   Robert Marko <robimarko@gmail.com>
Date:   Wed, 22 Sep 2021 22:23:22 +0200
Message-ID: <CAOX2RU5+jeXiqz8oss8Sd-BWa059uAv5xu=7nx_YF4RYpG2S6w@mail.gmail.com>
Subject: Re: [PATCH] arm64: dts: qcom: ipq8074: add SMEM support
To:     Kathiravan T <kathirav@codeaurora.org>
Cc:     Bjorn Andersson <bjorn.andersson@linaro.org>, agross@kernel.org,
        robh+dt@kernel.org, linux-arm-msm@vger.kernel.org,
        devicetree@vger.kernel.org,
        open list <linux-kernel@vger.kernel.org>
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On Tue, 21 Sept 2021 at 08:24, Kathiravan T <kathirav@codeaurora.org> wrote:
>
> On 2021-09-20 14:55, Robert Marko wrote:
> > On Mon, 20 Sept 2021 at 04:52, Bjorn Andersson
> > <bjorn.andersson@linaro.org> wrote:
> >>
> >> On Thu 02 Sep 16:47 CDT 2021, Robert Marko wrote:
> >>
> >> > IPQ8074 uses SMEM like other modern QCA SoC-s, so since its already
> >> > supported by the kernel add the required DT nodes.
> >> >
> >> > Signed-off-by: Robert Marko <robimarko@gmail.com>
> >>
> >> Thanks for your patch Robert.
> >>
> >> > ---
> >> >  arch/arm64/boot/dts/qcom/ipq8074.dtsi | 28 +++++++++++++++++++++++++++
> >> >  1 file changed, 28 insertions(+)
> >> >
> >> > diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> >> > index a620ac0d0b19..83e9243046aa 100644
> >> > --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> >> > +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
> >> > @@ -82,6 +82,29 @@ scm {
> >> >               };
> >> >       };
> >> >
> >> > +     reserved-memory {
> >> > +             #address-cells = <2>;
> >> > +             #size-cells = <2>;
> >> > +             ranges;
> >> > +
> >> > +             smem_region: memory@4ab00000 {
> >> > +                     no-map;
> >> > +                     reg = <0x0 0x4ab00000 0x0 0x00100000>;
> >> > +             };
> >> > +     };
> >> > +
> >> > +     tcsr_mutex: hwlock {
> >> > +             compatible = "qcom,tcsr-mutex";
> >> > +             syscon = <&tcsr_mutex_regs 0 0x80>;
> >>
> >> Since it's not okay to have a lone "syscon" and I didn't think it was
> >> worth coming up with a binding for the TCSR mutex "syscon" I rewrote
> >> the
> >> binding a while back. As such qcom,tcsr-mutex should now live in /soc
> >> directly.
> >>
> >> So can you please respin accordingly?
> >
> > Sure, can you just confirm that the:
> > reg = <0x01905000 0x8000>;
> >
> > Is the whole TCSR range as I don't have docs?
>
> Robert,
>
> TCSR_MUTEX block starts from 0x01905000 and has size 0x20000 (128KB)

Thanks, Kathiravan,
TSCR mutex with MMIO reg under it works, but there is some weird probe
ordering issue.

For whatever reason, SMEM will get probed only after MTD does and this
will cause issues
if SMEM parser is used as it will return -EPROBE_DEFER but the MTD
core does not really
handle it correctly and causes the device to reboot after failed parsing.

Now, I have no idea why does this variant which uses MMIO regmap probe
so much later?

Regards,
Robert


>
> Thanks,
> Kathiravan T.
>
> >
> > Regards,
> > Robert
> >>
> >> Thanks,
> >> Bjorn
> >>
> >> > +             #hwlock-cells = <1>;
> >> > +     };
> >> > +
> >> > +     smem {
> >> > +             compatible = "qcom,smem";
> >> > +             memory-region = <&smem_region>;
> >> > +             hwlocks = <&tcsr_mutex 0>;
> >> > +     };
> >> > +
> >> >       soc: soc {
> >> >               #address-cells = <0x1>;
> >> >               #size-cells = <0x1>;
> >> > @@ -293,6 +316,11 @@ gcc: gcc@1800000 {
> >> >                       #reset-cells = <0x1>;
> >> >               };
> >> >
> >> > +             tcsr_mutex_regs: syscon@1905000 {
> >> > +                     compatible = "syscon";
> >> > +                     reg = <0x01905000 0x8000>;
> >> > +             };
> >> > +
> >> >               sdhc_1: sdhci@7824900 {
> >> >                       compatible = "qcom,sdhci-msm-v4";
> >> >                       reg = <0x7824900 0x500>, <0x7824000 0x800>;
> >> > --
> >> > 2.31.1
> >> >
>
> --
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