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[23.128.96.18]) by mx.google.com with ESMTP id q10si6031338ilu.41.2021.09.23.01.12.47; Thu, 23 Sep 2021 01:12:58 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20210112.gappssmtp.com header.s=20210112 header.b=TlD70pmC; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237996AbhIWIMT (ORCPT + 99 others); Thu, 23 Sep 2021 04:12:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232435AbhIWIMS (ORCPT ); Thu, 23 Sep 2021 04:12:18 -0400 Received: from mail-qk1-x735.google.com (mail-qk1-x735.google.com [IPv6:2607:f8b0:4864:20::735]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 41B40C061574 for ; Thu, 23 Sep 2021 01:10:47 -0700 (PDT) Received: by mail-qk1-x735.google.com with SMTP id q125so4701202qkd.12 for ; Thu, 23 Sep 2021 01:10:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20210112.gappssmtp.com; s=20210112; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=1gg3dsSGVNcrvv3pRU06f1hq0fAMhtx1ktCnDl3V9Uw=; b=TlD70pmCUi7mEY5kGm4HRXI/fVhnJ8UCGL/T7dV4eopq1Qa3qgTxPmnOcmvRffCAxM boj0Kh51FNQTHrL7RT7dQDnkzprGxQJd8H/xP0pY7LJgI6u782XIrsqH17CeiFzo0eMu JB9umPI3pS31e0mib/ieVNHJ29w7EZYN6PGEW76yv+2wSS2EM3LPcW6/27+hTgaI7gwh tXncCOBzWOrkMVLfNJKozihaLHtJYUPQMVig05oTlOu25hiqBz43SlDkV165iweQ/SS8 GgjhVh0K6uPt9Y4N7sPXZUgu3Db8moGgSHR7ufHOTb9mH+54h7U4mQamVWc/YaOSvmrU I2qw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=1gg3dsSGVNcrvv3pRU06f1hq0fAMhtx1ktCnDl3V9Uw=; b=3EtSG7evE8dUQysHLbb1xr7iHcjo317OCKIoAMFko4x6kHNMDs6uHowhQFywVjU3LD 5rmaxwaRkhbIyL2SXCQY54Z947eXmAI5rqVx7DIrF2Hez6ubwnQKkMCendYrB7M7Y2U8 6RGHcbM8+Ss9o7yUFx0UVfLmhK+N4MqPKL5TgikGDUPWQC3WIUKhbf95L/CkoZzgIFQJ 4pfb2lo+yBt6d/3HvQ+NbkISY56a3ybnVNQxL0h4KKnJjlWxZhUC+lrQMRpGhAkjuCZ4 WKow2TC3o6f0qRPqNoK4Nh6mMo5LRY0aO1DmYpVZZz3veKxnR83qTQmlCX+heF2DUSXg fDBA== X-Gm-Message-State: AOAM533hVyu/fHFcy2UH0ONQYSAVb9Q+1dopcnc1ZE87H1hhszqez9ka MQLsiwNQ3jomw07/tVEl+ks2se0BHlix5AqqV9/14Q== X-Received: by 2002:a5b:783:: with SMTP id b3mr3845515ybq.328.1632384646402; Thu, 23 Sep 2021 01:10:46 -0700 (PDT) MIME-Version: 1.0 References: <20210922135319.3128153-1-piyush.mehta@xilinx.com> In-Reply-To: <20210922135319.3128153-1-piyush.mehta@xilinx.com> From: Bartosz Golaszewski Date: Thu, 23 Sep 2021 10:10:35 +0200 Message-ID: Subject: Re: [PATCH V4 0/3] gpio: modepin: Add driver support for modepin GPIO controller To: Piyush Mehta Cc: Arnd Bergmann , Zou Wei , Greg KH , Linus Walleij , Michal Simek , wendy.liang@xilinx.com, Nobuhiro Iwamatsu , Rob Herring , rajan.vaja@xilinx.com, linux-gpio , linux-devicetree , git , Srinivas Goud , arm-soc , LKML Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 22, 2021 at 3:53 PM Piyush Mehta wrote: > > This patch adds support for the zynqmp modepin GPIO controller and > documented for the same. GPIO modepin driver set and get the value and > status of the PS_MODE pin, based on device-tree pin configuration. > These four-bits boot-mode pins are dedicated configurable as input/output. > After the stabilization of the system,these mode pins are sampled. > > To access GPIO pins, added Xilinx ZynqMP firmware MDIO API support to > set and get PS_MODE pins value and status. These APIs are interface > APIs, between the mode pin controller driver and low-level API. > > --- > Changes in v2: > - Added Xilinx ZynqMP firmware MMIO API support to set and get pin > value and status. > - DT Documentation- Addressed review comments: Update commit message > - Modepin driver- Addressed review comments: > - Update APIs > - Removed unwanted variables > - Handle return path for probe function > > Review Comments: > https://lore.kernel.org/linux-arm-kernel/20210624205055.GA1961487@robh.at.kernel.org/T/#u > > Changes in v3: > - Update example in dt-bindings documentation > - Update probe function return value > - Remove unnecessary print and header file > > Review Comments: > https://lore.kernel.org/linux-arm-kernel/20210805174219.3000667-1-piyush.mehta@xilinx.com/#t > > Changes in v4: > - Added input pin read status in modepin_gpio_get_value. > - Updated modepin control bit for out configuration. > > Review Comments: > https://lore.kernel.org/linux-arm-kernel/554508f5-8cb5-3840-9f61-f6cd6e5745d2@xilinx.com/T/#u > --- > > Piyush Mehta (3): > firmware: zynqmp: Add MMIO read and write support for PS_MODE pin > dt-bindings: gpio: zynqmp: Add binding documentation for modepin > gpio: modepin: Add driver support for modepin GPIO controller > > .../bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml | 43 ++++++ > drivers/firmware/xilinx/zynqmp.c | 46 ++++++ > drivers/gpio/Kconfig | 12 ++ > drivers/gpio/Makefile | 1 + > drivers/gpio/gpio-zynqmp-modepin.c | 162 +++++++++++++++++++++ > include/linux/firmware/xlnx-zynqmp.h | 14 ++ > 6 files changed, 278 insertions(+) > create mode 100644 Documentation/devicetree/bindings/gpio/xlnx,zynqmp-gpio-modepin.yaml > create mode 100644 drivers/gpio/gpio-zynqmp-modepin.c > > -- > 2.7.4 > Series queued for next. Thanks! Bart