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Thu, 23 Sep 2021 10:37:47 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag2node2.st.com [10.75.127.5]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id 697022248BE; Thu, 23 Sep 2021 10:37:47 +0200 (CEST) Received: from lmecxl1060.lme.st.com (10.75.127.51) by SFHDAG2NODE2.st.com (10.75.127.5) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Thu, 23 Sep 2021 10:37:46 +0200 Subject: Re: [PATCH 3/4] i2c: stm32f7: stop dma transfer in case of NACK To: Alain Volmat , CC: , , , , , , References: <1632151292-18503-1-git-send-email-alain.volmat@foss.st.com> <1632151292-18503-4-git-send-email-alain.volmat@foss.st.com> From: Pierre Yves MORDRET Message-ID: Date: Thu, 23 Sep 2021 10:37:45 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <1632151292-18503-4-git-send-email-alain.volmat@foss.st.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG2NODE1.st.com (10.75.127.4) To SFHDAG2NODE2.st.com (10.75.127.5) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.182.1,Aquarius:18.0.790,Hydra:6.0.391,FMLib:17.0.607.475 definitions=2021-09-23_02,2021-09-22_01,2020-04-07_01 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Alain Look good to me Reviewed-by: Pierre-Yves MORDRET Regards On 9/20/21 5:21 PM, Alain Volmat wrote: > In case of receiving a NACK, the dma transfer should be stopped > to avoid feeding data into the FIFO. > Also ensure to properly return the proper error code and avoid > waiting for the end of the dma completion in case of > error happening during the transmission. > > Fixes: 7ecc8cfde553 ("i2c: i2c-stm32f7: Add DMA support") > > Signed-off-by: Alain Volmat > --- > drivers/i2c/busses/i2c-stm32f7.c | 9 +++++++-- > 1 file changed, 7 insertions(+), 2 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-stm32f7.c b/drivers/i2c/busses/i2c-stm32f7.c > index ad3459a3bc5e..50d5ae81d227 100644 > --- a/drivers/i2c/busses/i2c-stm32f7.c > +++ b/drivers/i2c/busses/i2c-stm32f7.c > @@ -1493,6 +1493,7 @@ static irqreturn_t stm32f7_i2c_isr_event(int irq, void *data) > { > struct stm32f7_i2c_dev *i2c_dev = data; > struct stm32f7_i2c_msg *f7_msg = &i2c_dev->f7_msg; > + struct stm32_i2c_dma *dma = i2c_dev->dma; > void __iomem *base = i2c_dev->base; > u32 status, mask; > int ret = IRQ_HANDLED; > @@ -1518,6 +1519,10 @@ static irqreturn_t stm32f7_i2c_isr_event(int irq, void *data) > dev_dbg(i2c_dev->dev, "<%s>: Receive NACK (addr %x)\n", > __func__, f7_msg->addr); > writel_relaxed(STM32F7_I2C_ICR_NACKCF, base + STM32F7_I2C_ICR); > + if (i2c_dev->use_dma) { > + stm32f7_i2c_disable_dma_req(i2c_dev); > + dmaengine_terminate_all(dma->chan_using); > + } > f7_msg->result = -ENXIO; > } > > @@ -1533,7 +1538,7 @@ static irqreturn_t stm32f7_i2c_isr_event(int irq, void *data) > /* Clear STOP flag */ > writel_relaxed(STM32F7_I2C_ICR_STOPCF, base + STM32F7_I2C_ICR); > > - if (i2c_dev->use_dma) { > + if (i2c_dev->use_dma && !f7_msg->result) { > ret = IRQ_WAKE_THREAD; > } else { > i2c_dev->master_mode = false; > @@ -1546,7 +1551,7 @@ static irqreturn_t stm32f7_i2c_isr_event(int irq, void *data) > if (f7_msg->stop) { > mask = STM32F7_I2C_CR2_STOP; > stm32f7_i2c_set_bits(base + STM32F7_I2C_CR2, mask); > - } else if (i2c_dev->use_dma) { > + } else if (i2c_dev->use_dma && !f7_msg->result) { > ret = IRQ_WAKE_THREAD; > } else if (f7_msg->smbus) { > stm32f7_i2c_smbus_rep_start(i2c_dev); > -- -- ~ Py MORDRET --