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[23.128.96.18]) by mx.google.com with ESMTP id s8si1831932edh.267.2021.09.23.03.27.06; Thu, 23 Sep 2021 03:27:30 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240383AbhIWK07 (ORCPT + 99 others); Thu, 23 Sep 2021 06:26:59 -0400 Received: from mout.kundenserver.de ([217.72.192.73]:53853 "EHLO mout.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231530AbhIWK06 (ORCPT ); Thu, 23 Sep 2021 06:26:58 -0400 Received: from mail-wr1-f42.google.com ([209.85.221.42]) by mrelayeu.kundenserver.de (mreue108 [213.165.67.113]) with ESMTPSA (Nemesis) id 1MBDrM-1mZRGd30Lm-00CkVZ; Thu, 23 Sep 2021 12:25:25 +0200 Received: by mail-wr1-f42.google.com with SMTP id t7so15596748wrw.13; Thu, 23 Sep 2021 03:25:24 -0700 (PDT) X-Gm-Message-State: AOAM533U++mQHBaaYO5RMxpMyepzUCbUHL4CJwEw4wDgCsGB0CAZkrVC JDOdxhP7WxoaowhEjwi12zJ5u2xoJwgGwODFipw= X-Received: by 2002:a05:6000:1561:: with SMTP id 1mr4003238wrz.369.1632392724385; Thu, 23 Sep 2021 03:25:24 -0700 (PDT) MIME-Version: 1.0 References: <20210921130127.24131-1-rpalethorpe@suse.com> <87o88mkor1.fsf@suse.de> <87lf3qkk72.fsf@suse.de> <87ilytkngp.fsf@suse.de> <87fstvlifu.fsf@suse.de> In-Reply-To: <87fstvlifu.fsf@suse.de> From: Arnd Bergmann Date: Thu, 23 Sep 2021 12:25:07 +0200 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: ia32 signed long treated as x64 unsigned int by __ia32_sys* To: rpalethorpe@suse.de Cc: Arnd Bergmann , Linux FS-devel Mailing List , Linux API , linux-aio , y2038 Mailman List , Andy Lutomirski , Thomas Gleixner , Ingo Molnar , Borislav Petkov , "the arch/x86 maintainers" , "H. Peter Anvin" , Deepa Dinamani , Linux Kernel Mailing List , LTP List Content-Type: text/plain; charset="UTF-8" X-Provags-ID: V03:K1:VsT0RG+x5xNNl9O9ELm6YaPkZKL9FOCyhaL/glhemx1qSo9Pqdt F5hd8W0T2BT/1gpRjV1jHZAaCEezqjigrdCSpB9ebAMrWdYzngCXs3SoUA64jEXZWhr/1mO 8tzEqLBWv44kAnMD/A9f345A3oMFlAOE5+Yn/05RP58yb5eLvg1UHZoXlPl6pjSdAvwYb6O TrYUwgYgq3LZIkS6cYIWw== X-Spam-Flag: NO X-UI-Out-Filterresults: notjunk:1;V03:K0:6eHKhAuQYxY=:s1HAIRIX+ogJcWuq5K/LVb ilhxyUya05Qxs8DX/KuEKg+8XsbNHSxfYxTOODXIs6q4C2LgElpNUIvB5fLjmvHfe3wAvaTtL LbKfvt6ck1irp1WfkZBjU8Z7OlJPZMZm7wPzBcMfeKWuKQyzKqSgfqWYs7d2/AVm3Td4U1++Q 9g4g3vj1aZ92WD8cYnjStOWMYdBZnnE8cR8g4YylnAg2IvTl0NLqVZq53fevtqdQ0yEYzSWSP fjBtKlpuk2iyoY6Xmj0L/pPvCs3dSc5mEWUgicLtXkpLMYBZgJGqGNlNA2bcwWE01u7jrjjnf 1JwtbmhV6mEZ2Xz0Tc30vHYPbhi1ysrtqLpm4Px9iR71dwnYV3xyQPzssCCb7TvKZVCGkqwBf uEUHz+vR8zNrpP6GjxN+20avT4FgT+xcPjS/kRjDuTdEi6Eh9unw1J4gKnlOhL3U7bE+yogiW OtF1zTZN/1BOOfqorn4sFnBrP4PcqzwdDjeyTiOv3u27rjTQ1aSW9NpjJmfmkPXJ6IcD8Pq6J ZwJPYhAZUoLEIMraP+8qStuPKX3LRA7JwEuO5RkWjEOxgEI34bkRphfiwbe134qN0Q89h81ft BWUPp0YXA16up+yosjj2c9UL1ENNaNAf2APSqhMs+Gop5Aiwrelc0GyS3222xbLnCg1eM38eL bma52stjJtehEdbWaiDVmBLHe3qr8d/uXUvjIZYVle4Gg7qBnAHJKw5VYtWSr2yQU5Kt5Y3wG 6o3q6ZKLaNyxzF/EaKgwQOxFOH04oLdbWBump3BFr2uEm0tDDEVBvXCsmYRsy5Jb/j5z7Il+T IzM2i0e9jFiPubqSWpIldkra3WICBCCOnaXYnVAeFOX8Yjq1UXzdbj8yKQ8nZZPJtZzPHL0EE Gv8mMjywzG/a1GZHI4OA== Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 23, 2021 at 12:01 PM Richard Palethorpe wrote: > Arnd Bergmann writes: > > On Wed, Sep 22, 2021 at 10:46 AM Richard Palethorpe wrote: > >> Richard Palethorpe writes: > > > > I also noticed that only x86 and s390 even have separate entry > > points for normal syscalls when called in compat mode, while > > the others all just zero the upper halves of the registers in the > > low-level entry code and then call the native entry point. > > It looks to me like aarch64 also has something similar? At any rate, I > can try to fix it for x86 and investigate what else might be effected. arm64 also has a custom asm/syscall_wrapper.h, but it only does this for accessing pt_regs (as x86 does), not for doing any argument conversion. x86 does the 32-to-64 widening in the wrapper, arm64 relies on the pt_regs already having the upper halves zeroed. Arnd