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From:   Anup Patel <anup@brainfault.org>
Date:   Thu, 23 Sep 2021 17:35:52 +0530
Message-ID: <CAAhSdy3C8LQNm=Jby1BcMU-xLXB-GiW076QO3QqRVvDQh7zPkA@mail.gmail.com>
Subject: Re: [PATCH] riscv: Add RISC-V svpbmt extension
To:     Alexandre Ghiti <alexandre.ghiti@canonical.com>
Cc:     Nick Kossifidis <mick@ics.forth.gr>,
        Philipp Tomsich <philipp.tomsich@vrull.eu>,
        Guo Ren <guoren@kernel.org>, Anup Patel <anup.patel@wdc.com>,
        Atish Patra <atish.patra@wdc.com>,
        Palmer Dabbelt <palmerdabbelt@google.com>,
        =?UTF-8?Q?Christoph_M=C3=BCllner?= <christoph.muellner@vrull.eu>,
        Christoph Hellwig <hch@lst.de>,
        liush <liush@allwinnertech.com>, wefu@redhat.com,
        =?UTF-8?B?V2VpIFd1ICjlkLTkvJ8p?= <lazyparser@gmail.com>,
        Drew Fustini <drew@beagleboard.org>,
        linux-riscv <linux-riscv@lists.infradead.org>,
        "linux-kernel@vger.kernel.org List" <linux-kernel@vger.kernel.org>,
        taiten.peng@canonical.com,
        Aniket Ponkshe <aniket.ponkshe@canonical.com>,
        Heinrich Schuchardt <heinrich.schuchardt@canonical.com>,
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On Thu, Sep 23, 2021 at 5:21 PM Alexandre Ghiti
<alexandre.ghiti@canonical.com> wrote:
>
> On Thu, Sep 23, 2021 at 12:11 PM Nick Kossifidis <mick@ics.forth.gr> wrot=
e:
> >
> > =CE=A3=CF=84=CE=B9=CF=82 2021-09-23 13:04, Philipp Tomsich =CE=AD=CE=B3=
=CF=81=CE=B1=CF=88=CE=B5:
> > >
> > > How if we expand this to a mmu subnode in cpu@x and add a booleans fo=
r
> > > adornments like svnapot and svpbmt?
> > > The older mmu-type could then treated to indicate a mmu w/o any
> > > adornments specified.  I am aware that this generates an additional
> > > parsing-path that will be maintained, but it will allow future
> > > properties to be grouped.
> > >
> > > cpu@0 {
> > > ...
> > > mmu {
> > > type =3D "riscv,sv39";
> > > supports-svpbmt;
> > > }
> > > ...
> > > }
> >
> > I was about to propose the same thing, we can do this now without
> > breaking backwards compatibility, we don't really use mmu-type property
> > at this point, we are either sv39 or nommu.
>
> Indeed, this property is only informative and not useful since we can
> directly "ask" the hw what it supports (cf sv48 patchset). And it
> cannot actually be used to force a certain svXX since reading the
> device tree happens way too late in the boot process (I have this
> issue with my sv48 patchset where I used to read the device tree to
> set the size of the address space, but it actually breaks KASAN).
>
> Isn't there a way to know if it supports svPBMT at runtime?

Unfortunately, we can't detect Svpmbt through CSR read/write
or traps.

A DT property seems to be the only way for Svpmbt.

Regards,
Anup

>
> Alex
>
> >
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv