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[68.147.0.187]) by smtp.gmail.com with ESMTPSA id j11sm9994545pjd.45.2021.09.23.09.55.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Sep 2021 09:55:06 -0700 (PDT) Date: Thu, 23 Sep 2021 10:55:03 -0600 From: Mathieu Poirier To: Suzuki K Poulose Cc: linux-arm-kernel@lists.infradead.org, anshuman.khandual@arm.com, mike.leach@linaro.org, leo.yan@linaro.org, coresight@lists.linaro.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 0/5] coresight: TRBE and Self-Hosted trace fixes Message-ID: <20210923165503.GB2189675@p14s> References: <20210923143919.2944311-1-suzuki.poulose@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20210923143919.2944311-1-suzuki.poulose@arm.com> Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 23, 2021 at 03:39:14PM +0100, Suzuki K Poulose wrote: > Here is the updated patches from the v3 of the series [0], parts of which > have been queued to coresight/next. This series now applies on the > coresight/next branch. > > Changes since v3: > - Split the spurious IRQ handling patch to : > a) coresight: trbe: irq handler: Do not disable TRBE if no action is needed > b) coresight: trbe: Fix handling of spurious interrupts > > - Added a helper to mark the ring buffer when there is WRAP event > and added a comment to explain. > > [0] https://lkml.kernel.org/r/20210914102641.1852544-1-suzuki.poulose@arm.com > > Suzuki K Poulose (5): > coresight: trbe: irq handler: Do not disable TRBE if no action is needed > coresight: trbe: Fix handling of spurious interrupts > coresight: trbe: Do not truncate buffer on IRQ > coresight: trbe: End the AUX handle on truncation > coresight: trbe: Prohibit trace before disabling TRBE > > .../coresight/coresight-self-hosted-trace.h | 4 +- > drivers/hwtracing/coresight/coresight-trbe.c | 96 ++++++++++++------- > 2 files changed, 64 insertions(+), 36 deletions(-) Applied and pushed - thanks for the modifications. Mathieu > > -- > 2.24.1 >