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Fri, 24 Sep 2021 09:31:13 +0000 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 24 Sep 2021 09:30:35 +0000 Received: from [10.26.49.14] (172.20.187.6) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Fri, 24 Sep 2021 09:30:33 +0000 Subject: =?UTF-8?B?UmU6IEJ1aWxkIGVycm9yOiDigJhFTV9SSVNDVuKAmSB1bmRlY2xhcmVk?= To: Miles Chen , Stefan Wahren , Jisheng Zhang , open list , Palmer Dabbelt References: <78cf3af71e035a79d021d17c6fd8a09dd1e4984d.camel@mediatek.com> CC: "linux-tegra@vger.kernel.org" From: Jon Hunter Message-ID: Date: Fri, 24 Sep 2021 10:30:30 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.13.0 MIME-Version: 1.0 In-Reply-To: <78cf3af71e035a79d021d17c6fd8a09dd1e4984d.camel@mediatek.com> Content-Type: text/plain; charset="utf-8"; format=flowed Content-Language: en-US Content-Transfer-Encoding: 8bit X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To DRHQMAIL107.nvidia.com (10.27.9.16) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 27c9d70d-3ba6-440c-80d9-08d97f3e0d8c X-MS-TrafficTypeDiagnostic: DM5PR12MB2344: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:8882; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Sep 2021 09:31:13.9848 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 27c9d70d-3ba6-440c-80d9-08d97f3e0d8c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.36];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT017.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM5PR12MB2344 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 13/09/2021 03:49, Miles Chen wrote: > On Sun, 2021-09-12 at 12:29 +0200, Stefan Wahren wrote: >> Hi, >> >> i tried to compile current torvalds tree >> ("78e709522d2c012cb0daad2e668506637bffb7c2") for >> arm/multi_v7_defconfig >> and get the following build issue: >> >> UPD include/generated/utsrelease.h >> scripts/sorttable.c: In function ‘do_file’: >> scripts/sorttable.c:352:7: error: ‘EM_RISCV’ undeclared (first use in >> this function) >> case EM_RISCV: >> ^ >> scripts/sorttable.c:352:7: note: each undeclared identifier is >> reported >> only once for each function it appears in >> >> I assume this is caused by: >> >> 54fed35fd3939398be292e4090b0b1c5ff2238b4 ("riscv: Enable >> BUILDTIME_TABLE_SORT") > > I hit this error too. I add the follow conditional EM_RISCV > definition in sorttable.c to build pass (arm64/defconfig). > > I will submit a patch out. > > diff --git a/scripts/sorttable.c b/scripts/sorttable.c > index f355869c65cd..6ee4fa882919 100644 > --- a/scripts/sorttable.c > +++ b/scripts/sorttable.c > @@ -54,6 +54,10 @@ > #define EM_ARCV2 195 > #endif > > +#ifndef EM_RISCV > +#define EM_RISCV 243 > +#endif > + This is still broken in the mainline. Any plans to get this fix merged there? I believe it has now been broken for nearly 2 weeks. Thanks! Jon -- nvpublic