Received: by 2002:a05:6a11:4021:0:0:0:0 with SMTP id ky33csp1786613pxb; Fri, 24 Sep 2021 11:49:35 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzJyGOQyetaMJwHGdcnz7foFMc2eQNhS1JRQxTwcge8sBIY6q4R3dtjQU7PVVsuRma/7ngV X-Received: by 2002:a02:c9d9:: with SMTP id c25mr10806447jap.81.1632509375793; Fri, 24 Sep 2021 11:49:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1632509375; cv=none; d=google.com; s=arc-20160816; b=xRCr6uaMDMm1kmIdMT/17EGliY82HhyT8Fgq4/Sk9clYx1jNZtZO8kY7O3qTYwKwlt x88oECZnzJY7PwZULBF5GGNCa3ekawjkxRBGVaJXSobjvG8TZtyhWS0eK9s+y9jcBFbr snTqFCD19yLav7/vMus87YKjxBWyYZzfHZIVWinF2SG7Tk02+ILXJHVfrFuXQ1oEIloe d8S89qaJufcSHPGgL7DwDh6NkImzWB3ovNav9rnRHF35LQV1R/DE/vWjW5dA9094Tdut fhq8EYo5wlAgseZExd8V0NfeN0HAQijuhtk5OQWulqNF4E2uZe6kp2geYVTvHjcKgfXs cRUw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:content-language :in-reply-to:mime-version:user-agent:date:message-id:from:references :cc:to:subject; bh=c97FOSngTo/7vmN7XHMWQXZcnWzxjoTpQDj98jBoDKA=; b=ymf/FGU0YSK2LrDrsNJH2Zj7jQn1yWcEADvs7o0lqdr3wpQh4pSfbf5uij6SA4oySb QpLcDg8LfohG9ny784pEdFEx6HH06BGnKHW5ObzNuvynBn07uXKT6I0cu3oUASyFFm+4 v1Bbe9HxX6XdmE3S3brgviHVRULAu/skff0EXkaF4JBKSvfDs7yfftVag2SbMqIoSrje B1EsDZ85vh47YishDalVH9T1SZFm3aEm61fCWYmdeF4W5UBYngc5qUzCSpZKIb620aNX jdthSNKDfH3vGvc5p3tuGwEEN/BQn+aIMd9RM2nHv9NmQqn78ktIIHS3r1ruC+AC8tqT zL7A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id i29si11162433jab.79.2021.09.24.11.49.24; Fri, 24 Sep 2021 11:49:35 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346594AbhIXNPp (ORCPT + 99 others); Fri, 24 Sep 2021 09:15:45 -0400 Received: from foss.arm.com ([217.140.110.172]:48162 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347104AbhIXNMi (ORCPT ); Fri, 24 Sep 2021 09:12:38 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CCB48113E; Fri, 24 Sep 2021 06:11:03 -0700 (PDT) Received: from [10.57.95.68] (unknown [10.57.95.68]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 0F4BD3F719; Fri, 24 Sep 2021 06:11:01 -0700 (PDT) Subject: Re: [PATCH v2 2/2] arm64: dts: qcom: sm8250: Add Coresight support To: Tao Zhang , Mathieu Poirier , Alexander Shishkin Cc: Mike Leach , Leo Yan , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Tingwei Zhang , Mao Jinlong , Yuanfang Zhang References: <1632477981-13632-1-git-send-email-quic_taozha@quicinc.com> <1632477981-13632-3-git-send-email-quic_taozha@quicinc.com> From: Suzuki K Poulose Message-ID: Date: Fri, 24 Sep 2021 14:11:00 +0100 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.15; rv:78.0) Gecko/20100101 Thunderbird/78.14.0 MIME-Version: 1.0 In-Reply-To: <1632477981-13632-3-git-send-email-quic_taozha@quicinc.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Tao On 24/09/2021 11:06, Tao Zhang wrote: > Add the basic coresight components found on Qualcomm SM8250 Soc. The > basic coresight components include ETF, ETMs,STM and the related > funnels. > > Signed-off-by: Tao Zhang Acked-by: Suzuki K Poulose PS: This patch must go via the Qcom DT maintainers. I would recommend sending this to the following people, so that it can be queued. $ scripts/get_maintainer.pl arch/arm64/boot/dts/qcom/qrb5165-rb5.dts Andy Gross (maintainer:ARM/QUALCOMM SUPPORT) Bjorn Andersson (maintainer:ARM/QUALCOMM SUPPORT) Rob Herring (maintainer:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) linux-arm-msm@vger.kernel.org (open list:ARM/QUALCOMM SUPPORT) devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS) linux-kernel@vger.kernel.org (open list) Kind regards Suzuki