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[23.128.96.18]) by mx.google.com with ESMTP id ce28si1697283edb.2.2021.09.27.01.29.37; Mon, 27 Sep 2021 01:30:01 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233543AbhI0I3F (ORCPT + 99 others); Mon, 27 Sep 2021 04:29:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58466 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233530AbhI0I3E (ORCPT ); Mon, 27 Sep 2021 04:29:04 -0400 Received: from metis.ext.pengutronix.de (metis.ext.pengutronix.de [IPv6:2001:67c:670:201:290:27ff:fe1d:cc33]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 83EE1C061604 for ; Mon, 27 Sep 2021 01:27:26 -0700 (PDT) Received: from gallifrey.ext.pengutronix.de ([2001:67c:670:201:5054:ff:fe8d:eefb] helo=[IPv6:::1]) by metis.ext.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1mUlyj-0004CN-SC; Mon, 27 Sep 2021 10:27:13 +0200 Message-ID: Subject: Re: [PATCH v2 1/4] dt-bindings: phy: phy-imx8-pcie: Add binding for the pad modes of imx8 pcie phy From: Lucas Stach To: Richard Zhu , kishon@ti.com, vkoul@kernel.org, robh@kernel.org, galak@kernel.crashing.org, shawnguo@kernel.org Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@pengutronix.de, linux-imx@nxp.com Date: Mon, 27 Sep 2021 10:27:10 +0200 In-Reply-To: <1632641983-1455-2-git-send-email-hongxing.zhu@nxp.com> References: <1632641983-1455-1-git-send-email-hongxing.zhu@nxp.com> <1632641983-1455-2-git-send-email-hongxing.zhu@nxp.com> Content-Type: text/plain; charset="UTF-8" User-Agent: Evolution 3.40.4 (3.40.4-1.fc34) MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-SA-Exim-Connect-IP: 2001:67c:670:201:5054:ff:fe8d:eefb X-SA-Exim-Mail-From: l.stach@pengutronix.de X-SA-Exim-Scanned: No (on metis.ext.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-kernel@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Am Sonntag, dem 26.09.2021 um 15:39 +0800 schrieb Richard Zhu: > Add binding for reference clock PAD modes of the i.MX8 PCIe PHY. > > Signed-off-by: Richard Zhu > --- > include/dt-bindings/phy/phy-imx8-pcie.h | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > create mode 100644 include/dt-bindings/phy/phy-imx8-pcie.h > > diff --git a/include/dt-bindings/phy/phy-imx8-pcie.h b/include/dt-bindings/phy/phy-imx8-pcie.h > new file mode 100644 > index 000000000000..59ed322f8d6c > --- /dev/null > +++ b/include/dt-bindings/phy/phy-imx8-pcie.h > @@ -0,0 +1,14 @@ > +/* SPDX-License-Identifier: GPL-2.0+ */ This should be (GPL-2.0+ OR MIT) to be compatible with the license of the DTSI file it is included in. > +/* > + * This header provides constants for i.MX8 PCIe. > + */ > + > +#ifndef _DT_BINDINGS_IMX8_PCIE_H > +#define _DT_BINDINGS_IMX8_PCIE_H > + > +/* Reference clock PAD mode */ > +#define IMX8_PCIE_REFCLK_PAD_NO_USED 0 I think _UNUSED would be the more idiomatic way to call this. > +#define IMX8_PCIE_REFCLK_PAD_INPUT 1 > +#define IMX8_PCIE_REFCLK_PAD_OUTPUT 2 > + > +#endif /* _DT_BINDINGS_IMX8_PCIE_H */