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[88.207.96.123]) by smtp.googlemail.com with ESMTPSA id n16sm10768025edd.10.2021.09.27.08.42.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Sep 2021 08:42:09 -0700 (PDT) From: Robert Marko To: andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Robert Marko Subject: [PATCH 3/4] arm64: dts: marvell: espressobin-ultra: add PHY and switch reset pins Date: Mon, 27 Sep 2021 17:41:58 +0200 Message-Id: <20210927154159.2168500-3-robert.marko@sartura.hr> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210927154159.2168500-1-robert.marko@sartura.hr> References: <20210927154159.2168500-1-robert.marko@sartura.hr> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Both the Topaz switch and 88E1512 PHY have their reset and interrupts connected to the SoC. So, define the Topaz and 88E1512 reset pins in the DTS. Defining the interrupt pins wont work as both the 88E1512 and the Topaz switch uses active LOW IRQ signals but the A37xx GPIO controller only supports edge triggers. 88E1512 would require special setup anyway as its INT pin is shared with the LED2 and you first need to configure it as INT. Signed-off-by: Robert Marko --- arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts index 8a700afd0570..96855a10b4a0 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dts @@ -118,12 +118,16 @@ &usb3 { &mdio { extphy: ethernet-phy@1 { reg = <1>; + + reset-gpios = <&gpionb 2 GPIO_ACTIVE_LOW>; }; }; &switch0 { reg = <3>; + reset-gpios = <&gpiosb 23 GPIO_ACTIVE_LOW>; + ports { switch0port1: port@1 { reg = <1>; -- 2.31.1