Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18;
Date:   Mon, 27 Sep 2021 14:03:18 -0300
From:   Jason Gunthorpe <jgg@nvidia.com>
To:     Leon Romanovsky <leon@kernel.org>
Cc:     Doug Ledford <dledford@redhat.com>,
        Aharon Landau <aharonl@nvidia.com>,
        "David S. Miller" <davem@davemloft.net>,
        Dennis Dalessandro <dennis.dalessandro@cornelisnetworks.com>,
        Gal Pressman <galpress@amazon.com>,
        Jakub Kicinski <kuba@kernel.org>, linux-kernel@vger.kernel.org,
        linux-rdma@vger.kernel.org, Maor Gottlieb <maorg@nvidia.com>,
        Mark Zhang <markzhang@nvidia.com>,
        Mike Marciniszyn <mike.marciniszyn@cornelisnetworks.com>,
        Mustafa Ismail <mustafa.ismail@intel.com>,
        Naresh Kumar PBS <nareshkumar.pbs@broadcom.com>,
        Neta Ostrovsky <netao@nvidia.com>, netdev@vger.kernel.org,
        Potnuri Bharat Teja <bharat@chelsio.com>,
        Saeed Mahameed <saeedm@nvidia.com>,
        Selvin Xavier <selvin.xavier@broadcom.com>,
        Shiraz Saleem <shiraz.saleem@intel.com>,
        Yishai Hadas <yishaih@nvidia.com>,
        Zhu Yanjun <zyjzyj2000@gmail.com>
Subject: Re: [PATCH rdma-next v1 05/11] RDMA/counter: Add optional counter
 support
Message-ID: <20210927170318.GB1529966@nvidia.com>
References: <cover.1631660727.git.leonro@nvidia.com>
 <04bd7354c6a375e684712d79915f7eb816efee92.1631660727.git.leonro@nvidia.com>
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <04bd7354c6a375e684712d79915f7eb816efee92.1631660727.git.leonro@nvidia.com>
MIME-Version: 1.0
X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1
X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?ddw8yK4GiIj1G7MIMym42biCWbAnnQNPb8IXs7uXQFs3Bv8Yd6heJtd1XZiE?=
 =?us-ascii?Q?kbvEXJVxWk43urrxYuqPz0wVevzHFKahfJCmPix8EKDo4vctqExjlz66nOrY?=
 =?us-ascii?Q?uaoYryukktzpfEeHUEefC8E3XfRHMWtZUIpR2qLQdwga27sWBrbSCZTzdU1P?=
 =?us-ascii?Q?2wkGWoCmkBGXXr2vUmzYmUnzwZOaTwu7KSu56NHLwE30A6jMFqX2nhr/wjVG?=
 =?us-ascii?Q?pvAP09yJh430bh6za3tmzAA/0hFGa6fjute1XIyPZjTT+0F25Ddx2ZDOOyGN?=
 =?us-ascii?Q?pwSae3sXOFAHE80kSieNV48x9vRy8eOdGHX6OtGnwwGMa5aQQKDiQBSf7SK+?=
 =?us-ascii?Q?+8GZYjEE4pmWVKKduevUaYF9SIxmggvgGQ6XuoSs0jLiVk6/KvLmHI3EA42j?=
 =?us-ascii?Q?2+QrxFVoseC1cWAApK32ycFEdrx7nNDGYFSs+MOCPlMwRP46oc17dPsvC5aJ?=
 =?us-ascii?Q?9Uh0PZZgVX7oul8TJgWCzssDfDNCBeSQ5+xkeSUyTo3T57mTNZuoz0y3cmHY?=
 =?us-ascii?Q?RDqnOMeO5ofQbZVnjuzOvp1H/PWdG+Niyaak+Im3gu6ryCuXyFFSVrgXgaA4?=
 =?us-ascii?Q?Pyldd9sKJxESLRhHj9sWxdqkKqjTy3Xi/M6Nteogls8F7K7jCun5wajJGPDM?=
 =?us-ascii?Q?ZeQNAX2cWptUIFKX6/LyQaRythsOcMkSSYhIl7X2N1h//GnZvNjWmeq/LUwc?=
 =?us-ascii?Q?UzFkvZlpNu51Psak/KI768ZCxAerfb9AenNvSOl8UKDFhiX2xXpHhRygDcja?=
 =?us-ascii?Q?r4g1AJo6EK5CyrmG0iXbNV742WLpGJ8DrrOyau9oXlu/ugV5sASc8nz5n/+U?=
 =?us-ascii?Q?3SSo6R7GDc+w4fZiFf6KV2VYy6iqqBrSiW5f58AEzQfyf9U+zZeijJ0PIHwZ?=
 =?us-ascii?Q?I1338/H6nCMhJ+eyJHjdFkYWviFL2gkw/rmV7hviFmsJQd3UzOjcptIBN/WX?=
 =?us-ascii?Q?h7OL+1R/h5+08Pce6BEeq+kxSp6gc7QG2JYqQnxe3RnW3FG37gOd+sfZChCv?=
 =?us-ascii?Q?Jc0YdLdYIM6M/fqe/VF0d/QvRh0CFbrUUymWQ2D4xtYIQB44HAqFHl1uTSdx?=
 =?us-ascii?Q?9wtpdx7Vf+xnqjxD4uHl3W3DW30QxZWqHyXlNqMDqsbNLdgG5krZKxgt7qWy?=
 =?us-ascii?Q?I+kNi7eHeipOzBtJtCk/kSTPF4IyxmjwJpXWyD6uVev04X0Z0nx2ZKXhzG56?=
 =?us-ascii?Q?8yL9/DMLqbPQcIAM8esksvsL4TFe7FFyQc9cqbSUqRHHlj4JrVhbLPhIcXN2?=
 =?us-ascii?Q?xfy2ezNvvpRbuPHzCm53o4tNjfDxdkvB0nBcz96EG5hun7e1ICMm7G3y5hu5?=
 =?us-ascii?Q?j/+JFLmv9mUqXbgs7Dxf3JqH?=
X-OriginatorOrg: Nvidia.com
X-MS-Exchange-CrossTenant-Network-Message-Id: 273fcc1f-36e3-4c40-5d57-08d981d8b4bf
X-MS-Exchange-CrossTenant-AuthSource: BL0PR12MB5506.namprd12.prod.outlook.com
X-MS-Exchange-CrossTenant-AuthAs: Internal
X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Sep 2021 17:03:19.7046
 (UTC)
X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted
X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a
X-MS-Exchange-CrossTenant-MailboxType: HOSTED
X-MS-Exchange-CrossTenant-UserPrincipalName: bWz65cvNr4i02r/M6MoryG2IRabuhcT84J37xBhjbLdP2HAAG4ZR7JWR1NicE2Cf
X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5190
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On Wed, Sep 15, 2021 at 02:07:24AM +0300, Leon Romanovsky wrote:
>  
> +int rdma_counter_modify(struct ib_device *dev, u32 port, int index, bool enable)
> +{
> +	struct rdma_hw_stats *stats;
> +	int ret;
> +
> +	if (!dev->ops.modify_hw_stat)
> +		return -EOPNOTSUPP;
> +
> +	stats = ib_get_hw_stats_port(dev, port);
> +	if (!stats)
> +		return -EINVAL;
> +
> +	mutex_lock(&stats->lock);
> +	ret = dev->ops.modify_hw_stat(dev, port, index, enable);
> +	if (!ret)
> +		enable ? clear_bit(index, stats->is_disabled) :
> +			set_bit(index, stats->is_disabled);

This is not a kernel coding style write out the if, use success
oriented flow

Also, shouldn't this logic protect the driver from being called on
non-optional counters?

>  	for (i = 0; i < data->stats->num_counters; i++) {
> -		attr = &data->attrs[i];
> +		if (data->stats->descs[i].flags & IB_STAT_FLAG_OPTIONAL)
> +			continue;
> +		attr = &data->attrs[pos];
>  		sysfs_attr_init(&attr->attr.attr);
>  		attr->attr.attr.name = data->stats->descs[i].name;
>  		attr->attr.attr.mode = 0444;
>  		attr->attr.show = hw_stat_device_show;
>  		attr->show = show_hw_stats;
> -		data->group.attrs[i] = &attr->attr.attr;
> +		data->group.attrs[pos] = &attr->attr.attr;
> +		pos++;
>  	}

This isn't OK, the hw_stat_device_show() computes the stat index like
this:

	return stat_attr->show(ibdev, ibdev->hw_stats_data->stats,
			       stat_attr - ibdev->hw_stats_data->attrs, 0, buf);

Which assumes the stats are packed contiguously. This only works
because mlx5 is always putting the optional stats at the end.

>  /**
>   * struct rdma_stat_desc
>   * @name - The name of the counter
> - *
> + * @flags - Flags of the counter; For example, IB_STAT_FLAG_OPTIONAL
>   */

The previous patch shouldn't have had the extra blank line then?

  
> +int rdma_counter_modify(struct ib_device *dev, u32 port, int index,
> +			bool is_add);

index should be unsigned int

The bool is called 'is_add' here but the implementation is 'enable' ?

Jason