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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?MbeOzvmyZtyGuYqIg8gFYQZVCLgxMhHjTbX6Cnf1P9tfwz7Suor1pImP8JPj?= =?us-ascii?Q?caO8q1PgVCOahQCCszk+zupX80XmzidTgq5okzLL73ltgtcSFMy5vAa4CEVn?= =?us-ascii?Q?TOQ4M5oEnT4EYh+gy5MQriwS/vct5rvCGogsj4kWW8zIh5puafcFPu+6pAB9?= =?us-ascii?Q?V7OllzpJtrWh8hp2HgHpNVhci6xk0OiPGuPtA0oNGgr0++xtZtBtrmNunmLO?= =?us-ascii?Q?MucA9WuPEaFD/hw7cpAfzMbkpw7eYQE97keo9C5hiewxKvPwkUtW0DIg3c68?= =?us-ascii?Q?iOzevMIgS2nCLU6KDhvgZ55iR09fqDN3kwYevBqbsPS2h2VD3aKA1i0SaagF?= =?us-ascii?Q?SrIwjD7XKqdtiiLN4B/9msRh/JYdOTTFVoft0g+D2ufyo+Gg7EWShXnJlQB0?= =?us-ascii?Q?3sJb1n/DBr3th7oz2cKMW85m6j2mDCWGPptgzmltkW02madh4fmGoJm9DBiA?= =?us-ascii?Q?sWAQrv942SbRP3h6RdameJXH6vUaHg48/S1twHJzMpuhD2z6gl/unIVx9yXu?= =?us-ascii?Q?sBVVSkjcD2NkVmzwBRgXkk+GV2OnenDZgwOv/JFLhioHDbrXxzOjcsM0wmgz?= =?us-ascii?Q?NEmRcIqZ2P0Ng/Ryp2MBUVbmj40rJC1SQbTPyDLjqO2GHTgeqk926by5iLdT?= =?us-ascii?Q?slZdR+entC+eQs/umXo3i/pFV9n0zgr6syMQ0M8s0f0jhympu3tZNU+F3YJ7?= =?us-ascii?Q?Zu1S7YDpNMVmUbPj4clJcnnPL733cw0OG+ptUj88XFX/fHY3Q15O7HNh4mG5?= =?us-ascii?Q?2wSTo+5XqDG9QRxxlGE/ypIcw1Kk4D1komdsBV4DMtFMxMl706iHRd/UAPKS?= =?us-ascii?Q?/TH0F2SbPzNo+6sVYd2NXBZ8XafDICmctv9X1gfHLpcFOkNVh+CROMVREZEx?= =?us-ascii?Q?mgRij3Tf9d4wuU11eV3jPowrANntpnds0fj4WCe0Bf6Y+rMADOngMmBLZwkZ?= =?us-ascii?Q?43hjPmt8O3zVgKw/hGidiRfpjqKAfHsaKB77sksgx6WTzI7fHRpYd04j0nmp?= =?us-ascii?Q?KucamxJj8AEGbCuVwOou9r/zEwMhZS1rb9GDOYlVjZY9eCFvZHF9Llx4YRTP?= =?us-ascii?Q?sCTnAgrS8OUlTT0uTHZ/Ek/mM6r/XBnrBAusOskl0wjtoR6WpLOxt6CcaZTV?= =?us-ascii?Q?IsHvuMXf2vt3vy6RUO9pqhcnvZzw0qKwK35sUyXFdjzruV3E+cEG2Jcph/I5?= =?us-ascii?Q?UoZElAKOQacaP7S27rdxv0zkVOUKY4d08rJN8Y5V7LCJhRyTVEAvNtg1EFzO?= =?us-ascii?Q?YUi4BnlgpAxnLnWHRPWXag72kSxRKl1A+EVY+WVvZu86jG2MRTepe+gD9Cto?= =?us-ascii?Q?PfCZfhJoc6EB1bM8xJaBiMbP?= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: d1431c98-a1fb-40f7-c25b-08d982cc05ba X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB5520.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Sep 2021 22:05:03.4026 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: uzyvAr62RCkiS3PB4f9w7ovyyuBGQUV5TbN1p4rjkcrxQooUFwxjGG3tU9k4b3o9 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB5550 Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Sep 16, 2021 at 05:40:44PM -0600, Logan Gunthorpe wrote: > +enum pci_p2pdma_map_type > +pci_p2pdma_map_segment(struct pci_p2pdma_map_state *state, struct device *dev, > + struct scatterlist *sg) > +{ > + if (state->pgmap != sg_page(sg)->pgmap) { > + state->pgmap = sg_page(sg)->pgmap; This has built into it an assumption that every page in the sg element has the same pgmap, but AFAIK nothing enforces this rule? There is no requirement that the HW has pfn gaps between the pgmaps linux decides to create over it. At least sg_alloc_append_table_from_pages() and probably something in the block world should be updated to not combine struct pages with different pgmaps, and this should be documented in scatterlist.* someplace. Jason