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[23.128.96.18]) by mx.google.com with ESMTP id y19si438033pgi.216.2021.09.29.10.53.24; Wed, 29 Sep 2021 10:53:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linutronix.de header.s=2020 header.b="I+VUN/NO"; dkim=neutral (no key) header.i=@linutronix.de header.s=2020e header.b=bQbMHfGU; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=linutronix.de Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245232AbhI2RRi (ORCPT + 99 others); Wed, 29 Sep 2021 13:17:38 -0400 Received: from Galois.linutronix.de ([193.142.43.55]:44244 "EHLO galois.linutronix.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S244648AbhI2RRg (ORCPT ); Wed, 29 Sep 2021 13:17:36 -0400 From: Thomas Gleixner DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1632935754; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=sWWcnqFRj6zAdMYEtH1XJ/oTMuUhVW1AUdTmaVur7iM=; b=I+VUN/NO1vuxg+Pjaj8NRFrhYq8XGcu1jaIKvk85LuwNRoAx/Coz54CjHgN3arWWAj3bNg +GjgtYsxpX+j8gP3aNjsx16XhaDNcCEdikGgs87YD4sMWRm4V/mjNkOZry8//CVn1gp2zJ wEbK1WfQmideZAl0wwjvCcf/JMa1dtnF+TJc/mWR7+u8mDadL9shQ8EfosbIMFv5J+Tuye rmn5G44VX+ujVE7tjF5yY3PkKVBFpK2sBdh1NEMDZEuClioQsr0xtrXRExLZRN13IDWN4D nrpi/DSXSNZEI0nUQcARd1/FnAz+ZbmpTbmhEu+0Xmu3oZTxrLHC2bn/gNhjaQ== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1632935754; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: in-reply-to:in-reply-to:references:references; bh=sWWcnqFRj6zAdMYEtH1XJ/oTMuUhVW1AUdTmaVur7iM=; b=bQbMHfGUYpufXmcUgOg7LH/S9ywiZ5cAMhdRpm4DuazNhhpeW0HP/J4ta6RZJtsEj/+oHg PICI3Mv2scapi+CQ== To: Andy Lutomirski , Peter Zijlstra Cc: Tony Luck , Fenghua Yu , Ingo Molnar , Borislav Petkov , Dave Hansen , Lu Baolu , Joerg Roedel , Josh Poimboeuf , Dave Jiang , Jacob Jun Pan , Raj Ashok , "Shankar, Ravi V" , iommu@lists.linux-foundation.org, the arch/x86 maintainers , Linux Kernel Mailing List Subject: Re: [PATCH 5/8] x86/mmu: Add mm-based PASID refcounting In-Reply-To: <75e95acc-6730-ddcf-d722-66e575076256@kernel.org> References: <20210920192349.2602141-1-fenghua.yu@intel.com> <20210920192349.2602141-6-fenghua.yu@intel.com> <87y27nfjel.ffs@tglx> <87o88jfajo.ffs@tglx> <87k0j6dsdn.ffs@tglx> <87r1d78t2e.ffs@tglx> <75e95acc-6730-ddcf-d722-66e575076256@kernel.org> Date: Wed, 29 Sep 2021 19:15:53 +0200 Message-ID: <877dez8fqu.ffs@tglx> MIME-Version: 1.0 Content-Type: text/plain Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Sep 29 2021 at 09:59, Andy Lutomirski wrote: > On 9/29/21 05:28, Thomas Gleixner wrote: >> Looking at that patch again, none of this muck in fpu__pasid_write() is >> required at all. The whole exception fixup is: >> >> if (!user_mode(regs)) >> return false; >> >> if (!current->mm->pasid) >> return false; >> >> if (current->pasid_activated) >> return false; > > <-- preemption or BH here: kaboom. Sigh, this had obviously to run in the early portion of #GP, i.e. before enabling interrupts. For me that's more than obvious and I apologize that I failed to mention it. >> >> wrmsrl(MSR_IA32_PASID, current->mm->pasid); > > This needs the actual sane fpstate writing helper -- see other email. And with that there is no fpstate write helper required at all. Stop this overengineering madness already. Thanks, tglx