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Date:   Wed, 29 Sep 2021 15:10:33 -0300
From:   =?utf-8?B?TsOtY29sYXMgRi4gUi4gQS4=?= Prado 
        <nfraprado@collabora.com>
To:     Brian Norris <briannorris@chromium.org>
Cc:     Heiko =?utf-8?Q?St=C3=BCbner?= <heiko@sntech.de>,
        linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org,
        linux-rockchip@lists.infradead.org,
        Sandy Huang <hjc@rock-chips.com>,
        Chen-Yu Tsai <wenst@chromium.org>,
        Thomas Hebb <tommyhebb@gmail.com>
Subject: Re: [PATCH v3 4/4] drm/rockchip: dsi: Disable PLL clock on bind error
Message-ID: <20210929181033.gzxolndj44cyezwz@notapiano>
References: <20210928213552.1001939-1-briannorris@chromium.org>
 <20210928143413.v3.4.I8bb7a91ecc411d56bc155763faa15f289d7fc074@changeid>
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On Tue, Sep 28, 2021 at 02:35:52PM -0700, Brian Norris wrote:
> Fix some error handling here noticed in review of other changes.
> 
> Fixes: 2d4f7bdafd70 ("drm/rockchip: dsi: migrate to use dw-mipi-dsi bridge driver")
> Signed-off-by: Brian Norris <briannorris@chromium.org>
> Reported-by: Chen-Yu Tsai <wenst@chromium.org>
> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

Tested-by: N?colas F. R. A. Prado <nfraprado@collabora.com>