Received: by 2002:a05:6a10:d5a5:0:0:0:0 with SMTP id gn37csp89656pxb; Thu, 30 Sep 2021 01:38:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw7XwFqZRm+U7VN5fQ8/UsUt6INH2m+PJf/s629TFTEvGOOFNX//jpyeA2bWcAQpFR9H/8O X-Received: by 2002:a50:9b06:: with SMTP id o6mr5586805edi.284.1632991114582; Thu, 30 Sep 2021 01:38:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1632991114; cv=none; d=google.com; s=arc-20160816; b=o7ZqixxYrZJcdTCLbVzL8udyaJcZ71An+T9pDR3sXGySb0VUU/IBbCe7LCSt85ytCC DTK6OGEaQAWiJDNmPHK954l2ck/iAqSH1EtkYWuzUxbYf7tcgPabg0EIcV+7ovj8QzZ1 PiYY+KjyEqcfWnkDzuHudEfmgxsmC4P2X2HIuVpUK7czOEE/sxa/qv/eYV3LbOGWMYDV Cd+sCDo3zH/bPA/FuNKmK7OtZb+JpBoaGTP0Co2v0Lpx9IeSROpH31YFGBU+7HgOcK1E 0f4cQmNSRjMEFj/6C0Nq8FE8RV71HbzKC+0a1keLPsGxH6FRazxjnSKdONVjardcQHh2 rh3A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=ng4Ia8UR2jEXAwCKPMC5THQDkrxh8dBmBin/iAdD2JE=; b=zRHEKo5rSQvokhmqruiSZBTVy081d5d1u+fOw0srCkDrphEUm54ruB8HHXXeMQ7Sv6 0UzRvcxVvPg6Cu1h463z+PxGiFocFd3o/EUf2c67qlsrqUwL9w41xqkBWrgo9TpF7geM NpjUXiJFTHJrWO4X9mYWWGNzwfzbRh8R9RVVtOPFgnJov1uad1e4tdrxO1vm6RLXR/ww LSbTNg4G0oTlKdEWfH5YPDfjEPfNxAZe7zivhxMTZp9/WCx1xR9dEdrru//MTMIIsvic eH4I6ZLl/5RrqtFNdIe7siHfXcE7TffU7nce97oCvv+9gyhJTZs3zQVPYhaxICjz3DSM jmbw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id bu1si2852310ejb.482.2021.09.30.01.38.09; Thu, 30 Sep 2021 01:38:34 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=collabora.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1349214AbhI3Idr (ORCPT + 99 others); Thu, 30 Sep 2021 04:33:47 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1349181AbhI3Idn (ORCPT ); Thu, 30 Sep 2021 04:33:43 -0400 Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [IPv6:2a00:1098:0:82:1000:25:2eeb:e3e3]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 47A1CC06161C; Thu, 30 Sep 2021 01:32:01 -0700 (PDT) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: eballetbo) with ESMTPSA id 4ABF81F449F0 From: Enric Balletbo i Serra To: linux-kernel@vger.kernel.org Cc: linux-mediatek@lists.infradead.org, eizan@chromium.org, kernel@collabora.com, drinkcat@chromium.org, jitao.shi@mediatek.com, chunkuang.hu@kernel.org, hsinyi@chromium.org, matthias.bgg@gmail.com, Rob Herring , Daniel Vetter , David Airlie , Philipp Zabel , Rob Herring , devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 3/7] dt-bindings: display: mediatek: add dsi reset optional property Date: Thu, 30 Sep 2021 10:31:46 +0200 Message-Id: <20210930103105.v4.3.Ifec72a83f224b62f24cfc967edfe78c5d276b2e3@changeid> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210930083150.3317003-1-enric.balletbo@collabora.com> References: <20210930083150.3317003-1-enric.balletbo@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Update device tree binding documentation for the dsi to add the optional property to reset the dsi controller. Signed-off-by: Enric Balletbo i Serra Acked-by: Rob Herring --- (no changes since v2) Changes in v2: - Added a new patch to describe the dsi reset optional property. .../devicetree/bindings/display/mediatek/mediatek,dsi.txt | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index d30428b9fb33..36b01458f45c 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -19,6 +19,11 @@ Required properties: Documentation/devicetree/bindings/graph.txt. This port should be connected to the input port of an attached DSI panel or DSI-to-eDP encoder chip. +Optional properties: +- resets: list of phandle + reset specifier pair, as described in [1]. + +[1] Documentation/devicetree/bindings/reset/reset.txt + MIPI TX Configuration Module ============================ @@ -45,6 +50,7 @@ dsi0: dsi@1401b000 { clocks = <&mmsys MM_DSI0_ENGINE>, <&mmsys MM_DSI0_DIGITAL>, <&mipi_tx0>; clock-names = "engine", "digital", "hs"; + resets = <&mmsys MT8173_MMSYS_SW0_RST_B_DISP_DSI0>; phys = <&mipi_tx0>; phy-names = "dphy"; -- 2.30.2