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Subject: Re: [PATCH] mmc: dw_mmc: avoid long timeout if register invalid
To:     =?UTF-8?Q?Christian_L=c3=b6hle?= <CLoehle@hyperstone.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>
Cc:     "marten.lindahl@axis.com" <marten.lindahl@axis.com>,
        "ulf.hansson@linaro.org" <ulf.hansson@linaro.org>
From:   Jaehoon Chung <jh80.chung@samsung.com>
Message-ID: <2cd1ea80-9fde-ef0f-6ce6-b29ba0894994@samsung.com>
Date:   Fri, 1 Oct 2021 09:15:00 +0900
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Hi

On 9/29/21 3:53 PM, Christian Löhle wrote:
> Hey,
> so more generally the timeout here can be 41954 up to 167783 ms.
> Is 42s too low to view it as invalid here?
> Would you prefer the patch exluding the specific timeout values instead of anything above
> 41954?
It's dependent with bus_hz value and div value.
So it's always not 167 or 42 seconds. Your comment is "TMOUT register is invalid".
But it's not invalid value. 
We can set to proper value at TMOUT register during probing or somewhere, according to each boards.

I understood what you want to avoid the long time timeout.
- I think your commit-msg, subject and comment need to describe in more detail. (Not register invalid)
- Not always 42 or 167secs when TMOUT is 0xFFFFFF. In some cases, it's under 100ms even though TMOUT is 0xFFFFFF.

If I misunderstood something, let me know, plz.

Anyway, Thanks for reporting this. 

Best Regards,
Jaehoon Chung

> 
> Regards,
> Christian
> 
> 
> 
> 
> From: Jaehoon Chung <jh80.chung@samsung.com>
> Sent: Friday, September 24, 2021 11:49 AM
> To: Christian Löhle; linux-kernel@vger.kernel.org; linux-mmc@vger.kernel.org
> Cc: marten.lindahl@axis.com; ulf.hansson@linaro.org
> Subject: Re: [PATCH] mmc: dw_mmc: avoid long timeout if register invalid
>     
> Hi,
> 
> On 9/17/21 4:50 PM, Christian Löhle wrote:
>>
>> Set the limit to 1s if the register is at reset value.
>>
>> Signed-off-by: Christian Loehle <cloehle@hyperstone.com>
>> ---
>>   drivers/mmc/host/dw_mmc.c | 8 ++++++++
>>   1 file changed, 8 insertions(+)
>>
>> diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c
>> index 6578cc64ae9e..cd9a6e0a7449 100644
>> --- a/drivers/mmc/host/dw_mmc.c
>> +++ b/drivers/mmc/host/dw_mmc.c
>> @@ -1983,6 +1983,14 @@ static void dw_mci_set_drto(struct dw_mci *host)
>>         /* add a bit spare time */
>>         drto_ms += 10;
>>   
>> +     /*
>> +      * If TMOUT register still holds the reset value the above calculation
>> +      * would yield a timeout of over 167 seconds, limit it to 1000ms.
>> +      * Normal reads/writes should not take anywhere close to 120s.
>> +      */
>> +     if (drto_ms > 120000)
>> +             drto_ms = 1000;
>> +
> 
> If dtrt_ms is 167sec, it means that bus_hz should be 0 or 1.
> What value is your host->bus_hz?
> 
> Best Regards,
> Jaehoon Chung
> 
>>         spin_lock_irqsave(&host->irq_lock, irqflags);
>>         if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events))
>>                 mod_timer(&host->dto_timer,
>>
> 
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