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[23.128.96.18]) by mx.google.com with ESMTP id y39si9166002pfa.173.2021.10.01.02.24.23; Fri, 01 Oct 2021 02:24:36 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1353005AbhJAJYh (ORCPT + 99 others); Fri, 1 Oct 2021 05:24:37 -0400 Received: from mail.kernel.org ([198.145.29.99]:58082 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230026AbhJAJYg (ORCPT ); Fri, 1 Oct 2021 05:24:36 -0400 Received: from disco-boy.misterjones.org (disco-boy.misterjones.org [51.254.78.96]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 0E71F61350; Fri, 1 Oct 2021 09:22:53 +0000 (UTC) Received: from sofa.misterjones.org ([185.219.108.64] helo=why.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1mWEkk-00E9xv-SU; Fri, 01 Oct 2021 10:22:51 +0100 Date: Fri, 01 Oct 2021 10:22:50 +0100 Message-ID: <87pmsprted.wl-maz@kernel.org> From: Marc Zyngier To: Mark Rutland , Pingfan Liu Cc: linux-arm-kernel@lists.infradead.org, "Paul E. McKenney" , Catalin Marinas , Will Deacon , Joey Gouly , Sami Tolvanen , Julien Thierry , Thomas Gleixner , Yuichi Ito , linux-kernel@vger.kernel.org Subject: Re: [PATCHv3 3/3] arm64/entry-common: supplement irq accounting In-Reply-To: <20210930135314.GC18258@lakrids.cambridge.arm.com> References: <20210930131708.35328-1-kernelfans@gmail.com> <20210930131708.35328-4-kernelfans@gmail.com> <20210930135314.GC18258@lakrids.cambridge.arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (x86_64-pc-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: mark.rutland@arm.com, kernelfans@gmail.com, linux-arm-kernel@lists.infradead.org, paulmck@kernel.org, catalin.marinas@arm.com, will@kernel.org, joey.gouly@arm.com, samitolvanen@google.com, julien.thierry@arm.com, tglx@linutronix.de, ito-yuichi@fujitsu.com, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 30 Sep 2021 14:53:14 +0100, Mark Rutland wrote: > > On Thu, Sep 30, 2021 at 09:17:08PM +0800, Pingfan Liu wrote: > > At present, the irq entry/exit accounting, which is performed by > > handle_domain_irq(), overlaps with arm64 exception entry code somehow. > > > > By supplementing irq accounting on arm64 exception entry code, the > > accounting in handle_domain_irq() can be dropped totally by selecting > > the macro HAVE_ARCH_IRQENTRY. > > I think we need to be more thorough and explain the specific problem and > solution. How about we crib some wording from patch 1, and say: > > arm64: entry: avoid double-accounting IRQ RCU entry > > When an IRQ is taken, some accounting needs to be performed to enter > and exit IRQ context around the IRQ handler. On arm64 some of this > accounting is performed by both the architecture code and the IRQ > domain code, resulting in calling rcu_irq_enter() twice per exception > entry, violating the expectations of the core RCU code, and resulting > in failing to identify quiescent periods correctly (e.g. in > rcu_is_cpu_rrupt_from_idle()). > > To fix this, we must perform all the accounting from the architecture > code. We prevent the IRQ domain code from performing any accounting by > selecting HAVE_ARCH_IRQENTRY, and must call irq_enter_rcu() and > irq_exit_rcu() around invoking the root IRQ handler. > > When we take a pNMI from a context with IRQs disabled, we'll perform > the necessary accounting as part of arm64_enter_nmi() and > arm64_exit_nmi(), and should only call irq_enter_rcu() and > irq_exit_rcu() when we may have taken a regular interrupt. > > That way it's clear what specifically the overlap is and the problem(s) > it results in. The bit at the end explains why we don't call > irq_{enter,exit}_rcu() when we're certain we've taken a pNMI. > > > Signed-off-by: Pingfan Liu > > Cc: "Paul E. McKenney" > > Cc: Catalin Marinas > > Cc: Will Deacon > > Cc: Mark Rutland > > Cc: Marc Zyngier > > Cc: Joey Gouly > > Cc: Sami Tolvanen > > Cc: Julien Thierry > > Cc: Thomas Gleixner > > Cc: Yuichi Ito > > Cc: linux-kernel@vger.kernel.org > > To: linux-arm-kernel@lists.infradead.org > > --- > > arch/arm64/Kconfig | 1 + > > arch/arm64/kernel/entry-common.c | 4 ++++ > > 2 files changed, 5 insertions(+) > > > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > > index 5c7ae4c3954b..d29bae38a951 100644 > > --- a/arch/arm64/Kconfig > > +++ b/arch/arm64/Kconfig > > @@ -98,6 +98,7 @@ config ARM64 > > select ARCH_HAS_UBSAN_SANITIZE_ALL > > select ARM_AMBA > > select ARM_ARCH_TIMER > > + select HAVE_ARCH_IRQENTRY > > Please put this with the other HAVE_ARCH_* entries in > arch/arm64/Kconfig -- it should be between HAVE_ARCH_HUGE_VMAP and > HAVE_ARCH_JUMP_LABEL to keep that in alphabetical order. > > With that and the title and commit message above: > > Reviewed-by: Mark Rutland With the above changes, Reviewed-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.