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Date:   Fri, 1 Oct 2021 14:37:45 +0200
From:   Joerg Roedel <joro@8bytes.org>
To:     Dave Hansen <dave.hansen@intel.com>
Cc:     x86@kernel.org, Thomas Gleixner <tglx@linutronix.de>,
        Ingo Molnar <mingo@redhat.com>, Borislav Petkov <bp@alien8.de>,
        hpa@zytor.com, Dave Hansen <dave.hansen@linux.intel.com>,
        Andy Lutomirski <luto@kernel.org>,
        Peter Zijlstra <peterz@infradead.org>,
        Joerg Roedel <jroedel@suse.de>,
        Mike Rapoport <rppt@kernel.org>,
        Andrew Morton <akpm@linux-foundation.org>,
        Brijesh Singh <brijesh.singh@amd.com>,
        linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 3/4] x86/mm: Flush global TLB when switching to
 trampoline page-table
Message-ID: <YVcBGYKQU5dFggvy@8bytes.org>
References: <20210929145501.4612-1-joro@8bytes.org>
 <20210929145501.4612-4-joro@8bytes.org>
 <18be825f-b3f3-3e05-1b14-82712d9a6c0d@intel.com>
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On Wed, Sep 29, 2021 at 08:07:10AM -0700, Dave Hansen wrote:
> 	/*
> 	 * The CR3 writes above may not flush global TLB entries.
> 	 * Stale, global entries from previous sets of page tables may
> 	 * still be present.  Flush those stale entries.
> 	 *
> 	 * This ensures that memory accessed while running with
> 	 * trampoline_pgd is *actually* mapped into trampoline_pgd.
> 	 */

Yes, this is better. I replaced my comment with this one (only did some
minor rewording).

Thanks,

	Joerg