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[23.128.96.18]) by mx.google.com with ESMTP id 26si7735790ejl.648.2021.10.01.07.26.58; Fri, 01 Oct 2021 07:27:24 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="ZX/zp88H"; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1354489AbhJAO0z (ORCPT + 99 others); Fri, 1 Oct 2021 10:26:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52854 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1353768AbhJAO0y (ORCPT ); Fri, 1 Oct 2021 10:26:54 -0400 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2B6DCC06177D for ; Fri, 1 Oct 2021 07:25:10 -0700 (PDT) Received: by mail-lf1-x130.google.com with SMTP id z24so39558727lfu.13 for ; Fri, 01 Oct 2021 07:25:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=uoTsMILdh2iae8vlYA/uD6rXVrqQcXGr4rKOWNIrfP4=; b=ZX/zp88Hzbtc6VumtwtOf/Oh+OaJ0chzGkXC5wf4sPS8EnMadE1LYVMn+oQGU+kHb8 R+gyJ0Wgd6EZVoHYlNsYzRsUaZ5Rp/cdsIRgMegZH1fxe5M9LdMHvWaVupGppgdYzZDW TD5Kr9uQc875LMcukvjCblVlHVTBOl7gxHxMLD9oTeyGDqmxuy531Ve1dY7h60MRyk+C V8sDsQ9/XhH26KEHzkzm/kuAtjxeW7JVdmQ74ybXucxQOcK8nSOutATp4BamK5izx3m/ P4rAUs6vctnmnFw0UhIdyFrrMh5OhPkSyPf5wfcKi9tqeuxiNdqmo/N2ZPtT7kOoHYhb jrrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=uoTsMILdh2iae8vlYA/uD6rXVrqQcXGr4rKOWNIrfP4=; b=7BPzVnSKnrD3xbkvrQEmh/B81l+mZWtrkTxpZ/8zylHWbVioxww0XPNOLfd7ayiRRN a8qhm+CnjKZ4yQNXHnHgsJ1bGYDN9xZZUgSU4NYsXv/pwOfLuEOC3UdK8vYCL7+fpZHl 2oK/b5ZWrQaKzz8HCPD1vFgKdun5M9T5TGLfPzbji3PHa2K0MboUnCBideKK+cF6hs/N o0E11xeOdyprip8M3dgJcgCesfusN92xD+IbqGist0LztoO9cFT/zwEfWk2i3PO9k7Y9 v6LsGvAoLOaObczs3C8jjflu38cF1yd26BFG3V9FRLT3lLtBdpi4HIG+x086LjZtbFXd 4vvQ== X-Gm-Message-State: AOAM531j4rxmh52bZ23fYSs9wCXYLE6jgIHE/+ZbNdsaolYeqTAG7+hF ayPjtES6bycHAJu2mANlvHisidupwUogLyBNJqOqvA== X-Received: by 2002:a05:6512:2397:: with SMTP id c23mr5584384lfv.358.1633098308316; Fri, 01 Oct 2021 07:25:08 -0700 (PDT) MIME-Version: 1.0 References: <20210926224058.1252-1-digetx@gmail.com> <20210926224058.1252-21-digetx@gmail.com> In-Reply-To: <20210926224058.1252-21-digetx@gmail.com> From: Ulf Hansson Date: Fri, 1 Oct 2021 16:24:32 +0200 Message-ID: Subject: Re: [PATCH v13 20/35] mtd: rawnand: tegra: Add runtime PM and OPP support To: Dmitry Osipenko Cc: Thierry Reding , Jonathan Hunter , Viresh Kumar , Stephen Boyd , Peter De Schrijver , Mikko Perttunen , Peter Chen , Lee Jones , =?UTF-8?Q?Uwe_Kleine=2DK=C3=B6nig?= , Nishanth Menon , Adrian Hunter , Michael Turquette , Linux Kernel Mailing List , linux-tegra , Linux PM , Linux USB List , linux-staging@lists.linux.dev, linux-pwm@vger.kernel.org, linux-mmc , dri-devel , DTML , linux-clk , Mark Brown , Vignesh Raghavendra , Richard Weinberger , Miquel Raynal , Lucas Stach , Stefan Agner , Mauro Carvalho Chehab , David Heidelberg Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, 27 Sept 2021 at 00:42, Dmitry Osipenko wrote: > > The NAND on Tegra belongs to the core power domain and we're going to > enable GENPD support for the core domain. Now NAND must be resumed using > runtime PM API in order to initialize the NAND power state. Add runtime PM > and OPP support to the NAND driver. > > Acked-by: Miquel Raynal > Signed-off-by: Dmitry Osipenko > --- > drivers/mtd/nand/raw/tegra_nand.c | 55 ++++++++++++++++++++++++++----- > 1 file changed, 47 insertions(+), 8 deletions(-) > > diff --git a/drivers/mtd/nand/raw/tegra_nand.c b/drivers/mtd/nand/raw/tegra_nand.c > index 32431bbe69b8..098fcc9cb9df 100644 > --- a/drivers/mtd/nand/raw/tegra_nand.c > +++ b/drivers/mtd/nand/raw/tegra_nand.c > @@ -17,8 +17,11 @@ > #include > #include > #include > +#include > #include > > +#include > + > #define COMMAND 0x00 > #define COMMAND_GO BIT(31) > #define COMMAND_CLE BIT(30) > @@ -1151,6 +1154,7 @@ static int tegra_nand_probe(struct platform_device *pdev) > return -ENOMEM; > > ctrl->dev = &pdev->dev; > + platform_set_drvdata(pdev, ctrl); > nand_controller_init(&ctrl->controller); > ctrl->controller.ops = &tegra_nand_controller_ops; > > @@ -1166,14 +1170,22 @@ static int tegra_nand_probe(struct platform_device *pdev) > if (IS_ERR(ctrl->clk)) > return PTR_ERR(ctrl->clk); > > - err = clk_prepare_enable(ctrl->clk); > + err = devm_pm_runtime_enable(&pdev->dev); > + if (err) > + return err; > + > + err = devm_tegra_core_dev_init_opp_table_common(&pdev->dev); > + if (err) > + return err; > + > + err = pm_runtime_resume_and_get(&pdev->dev); > if (err) > return err; > > err = reset_control_reset(rst); > if (err) { > dev_err(ctrl->dev, "Failed to reset HW: %d\n", err); > - goto err_disable_clk; > + goto err_put_pm; > } > > writel_relaxed(HWSTATUS_CMD_DEFAULT, ctrl->regs + HWSTATUS_CMD); > @@ -1188,21 +1200,19 @@ static int tegra_nand_probe(struct platform_device *pdev) > dev_name(&pdev->dev), ctrl); > if (err) { > dev_err(ctrl->dev, "Failed to get IRQ: %d\n", err); > - goto err_disable_clk; > + goto err_put_pm; > } > > writel_relaxed(DMA_MST_CTRL_IS_DONE, ctrl->regs + DMA_MST_CTRL); > > err = tegra_nand_chips_init(ctrl->dev, ctrl); > if (err) > - goto err_disable_clk; > - > - platform_set_drvdata(pdev, ctrl); > + goto err_put_pm; > There is no corresponding call pm_runtime_put() here. Is it intentional to always leave the device runtime resumed after ->probe() has succeeded? I noticed you included some comments about this for some other drivers, as those needed more tweaks. Is that also the case for this driver? > return 0; > > -err_disable_clk: > - clk_disable_unprepare(ctrl->clk); > +err_put_pm: > + pm_runtime_put(ctrl->dev); > return err; > } > [...] Kind regards Uffe