Received: by 2002:a05:6a10:d5a5:0:0:0:0 with SMTP id gn37csp3523405pxb; Mon, 4 Oct 2021 04:18:13 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzWa3GaueX6In9XlwPxSUDmkDlj5HGUwUYFj1CRo6iVR9qrTZB7mfA3BIO9ADZhPC5RS982 X-Received: by 2002:a50:d841:: with SMTP id v1mr17123979edj.221.1633346293136; Mon, 04 Oct 2021 04:18:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633346293; cv=none; d=google.com; s=arc-20160816; b=nqzQPP7g+6gZ25+i2h1NZnwEG/eJ3dn4S249R12wp5x1Gq2uVcPEWcme/LKDxZNs8Z Un0T8U5dh87Lo+7nnJvlv6oopLwJnK4y/3m+XiCPyidBbMe06z6iM+4S+B5D9fqi+mIK xCiNPRuFnJ67xvujosraw7JBjAhseUmTkkQAtIFOCXAJnZ+xUcM0t4aeMzb4CXyUcmOa nYXw6LIk0dGbaDc8PQykhwydhB5BnXDrlR6EwO9mF21AVLgcEdoEAHcna9sQpqSA3WdT vVS5yJpihbRXQ2eX3Oa/bsmtYTQpUTIyKmNwjQ9ckgXfOG0Y4RNn8nfIF/SPxrtih1WQ AiSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=q1bbcwdr9XzDeEn4VKYOeOZ4rXqfu55dyMyuiatyqIA=; b=0od77SmZ0LzQAnELJ4m7kuE0f+zycPjSLyMVf0QpMora9OdnO+3QdGatPIwbhHMqd3 dXF7qWtouBYKdWrV4UTjSRBstHT8+lxSoyCdrYOV6+2F3e9ntwcPtMBUtz51SEDbBUA3 q3v0SKX/Gpi/ISjvNixvcpvMr/piOZ+rVl78frYsnqtbidyvKE2J51UyRQDuV1pNvDGO HOQo2rjRiOpV/wYPLffrmwFrdt2nZvBaIRjZNK8+iT69d3RGfaJwfDDSXUJdQTT5aFmw LYTVVwem1vdYt9bvMeimIhLJrLTsTgBfT0Nxlzi1kVDiVIyGS/kJWE004Fj8ypVvTm+M B3xA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id c14si23191364edm.165.2021.10.04.04.17.49; Mon, 04 Oct 2021 04:18:13 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linux-kernel-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232426AbhJDLRa (ORCPT + 99 others); Mon, 4 Oct 2021 07:17:30 -0400 Received: from mx1.tq-group.com ([93.104.207.81]:27097 "EHLO mx1.tq-group.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232413AbhJDLR3 (ORCPT ); Mon, 4 Oct 2021 07:17:29 -0400 X-IronPort-AV: E=Sophos;i="5.85,345,1624312800"; d="scan'208";a="19847137" Received: from unknown (HELO tq-pgp-pr1.tq-net.de) ([192.168.6.15]) by mx1-pgp.tq-group.com with ESMTP; 04 Oct 2021 13:15:38 +0200 Received: from mx1.tq-group.com ([192.168.6.7]) by tq-pgp-pr1.tq-net.de (PGP Universal service); Mon, 04 Oct 2021 13:15:38 +0200 X-PGP-Universal: processed; by tq-pgp-pr1.tq-net.de on Mon, 04 Oct 2021 13:15:38 +0200 X-IronPort-AV: E=Sophos;i="5.85,345,1624312800"; d="scan'208";a="19847134" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 04 Oct 2021 13:15:38 +0200 Received: from steina-w.tq-net.de (unknown [10.123.49.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 4FE09280065; Mon, 4 Oct 2021 13:15:38 +0200 (CEST) From: Alexander Stein To: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Rob Herring , Pratyush Yadav , Michael Walle , Tudor Ambarus Cc: Alexander Stein , linux-mtd@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] dt-bindings: mtd: spi-nor: Add output-driver-strength property Date: Mon, 4 Oct 2021 13:15:28 +0200 Message-Id: <20211004111529.211089-1-Alexander.Stein@tq-systems.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Alexander Stein This property is for optimizing output voltage impedance and is specific to each board. Signed-off-by: Alexander Stein --- I checked Micron and Macronix datasheets. Both have similar but not identical supported values. Also the register locations are different. For those reasons I decided to specify the Ohms value directly and let the device specfic driver figure out if it is supported where to write it to. BTW: Are the Ohm values and the corresponding register bits standardized somewhere? Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml index ed590d7c6e37..7d7f20a741b5 100644 --- a/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml +++ b/Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml @@ -72,6 +72,12 @@ properties: be used on such systems, to denote the absence of a reliable reset mechanism. + output-driver-strength: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Output driver strength in Ohms which optimizes the impedance at Vcc/2 + output voltage. + label: true partitions: -- 2.25.1